diff options
| author | Tom Rini | 2016-04-22 16:41:25 -0400 |
|---|---|---|
| committer | Tom Rini | 2016-04-25 15:09:40 -0400 |
| commit | 78d1e1d0a157c8b48ea19be6170b992745d30f38 (patch) | |
| tree | 5d536a283e4e72c28f08a261435c9dff532f22b4 /include/configs/socfpga_common.h | |
| parent | 4d7100a61d6fe0652dd0e8b7b3cc31ad37483d64 (diff) | |
configs: Re-sync almost all of cmd/Kconfig
This syncs up the current cmd/Kconfig and include/configs/ files with the
only exception being CMD_NAND. Due to how we have used this historically
we need to take further care here when converting.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/socfpga_common.h')
| -rw-r--r-- | include/configs/socfpga_common.h | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2b652419c49..9b2313c3e6a 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -89,8 +89,6 @@ * EPCS/EPCQx1 Serial Flash Controller */ #ifdef CONFIG_ALTERA_SPI -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 30000000 /* * The base address is configurable in QSys, each board must specify the @@ -197,7 +195,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); #define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000) #endif -#define CONFIG_CMD_I2C /* * QSPI support @@ -216,12 +213,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() #endif #define CONFIG_CQSPI_DECODER 0 -#define CONFIG_CMD_SF /* * Designware SPI support */ -#define CONFIG_CMD_SPI /* * Serial Driver |