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author | Marek Vasut | 2014-12-30 19:41:17 +0100 |
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committer | Marek Vasut | 2015-03-04 23:07:04 +0100 |
commit | 0d13a0051b22c95822703e64d0046bbf3b36b13b (patch) | |
tree | d3cf646e8bbd319ec86624759630704638f18048 /include/configs/socfpga_cyclone5.h | |
parent | a2d96abe398b160b8bbed04c86f00df5e3d4fb98 (diff) |
arm: socfpga: Sync Cyclone V DK PLL configuration
Sync SoCFPGA Cyclone V development kit pinmux configuration with
Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR).
NOTE: This change is useless until we get proper SPL support, at
which point this will likely need further rework.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Pavel Machek <pavel@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Diffstat (limited to 'include/configs/socfpga_cyclone5.h')
0 files changed, 0 insertions, 0 deletions