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authorTom Rini2022-07-23 13:05:07 -0400
committerTom Rini2022-08-04 16:18:47 -0400
commit13e28f4987dd514ddbda36915bd9b8996a2d328d (patch)
tree43e094e4c104d88e8decf58a4b78c741f776fd32 /include/configs/xtfpga.h
parent2d752b0d4a221df642033a7fb48e2ced3feef481 (diff)
configs: Remove a number of unreferenced CONFIG options.
There are a large number of options under CONFIG_SYS (but some of these are elsewhere, spotted while cleaning CONFIG_SYS) that are never referenced, or only used slightly later in the config file. Remove or restructure these. Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/xtfpga.h')
-rw-r--r--include/configs/xtfpga.h24
1 files changed, 4 insertions, 20 deletions
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 526165cf102..ad8ea6538c2 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -76,13 +76,12 @@
#if defined(CONFIG_MAX_MEM_MAPPED) && \
CONFIG_MAX_MEM_MAPPED < CONFIG_SYS_SDRAM_SIZE
-#define CONFIG_SYS_MEMORY_SIZE CONFIG_MAX_MEM_MAPPED
+#define XTENSA_SYS_TEXT_ADDR \
+ (MEMADDR(CONFIG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN)
#else
-#define CONFIG_SYS_MEMORY_SIZE CONFIG_SYS_SDRAM_SIZE
-#endif
-
#define XTENSA_SYS_TEXT_ADDR \
- (MEMADDR(CONFIG_SYS_MEMORY_SIZE) - CONFIG_SYS_MONITOR_LEN)
+ (MEMADDR(CONFIG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN)
+#endif
/*==============================*/
/* U-Boot general configuration */
@@ -105,18 +104,6 @@
* SHIFT left amount and field WIDTH (bits), and also by a bitMASK.
*/
-/* Date of FPGA bitstream build in binary coded decimal (BCD) */
-#define CONFIG_SYS_FPGAREG_DATE IOADDR(0x0D020000)
-#define FPGAREG_MTH_SHIFT 24 /* BCD month 1..12 */
-#define FPGAREG_MTH_WIDTH 8
-#define FPGAREG_MTH_MASK 0xFF000000
-#define FPGAREG_DAY_SHIFT 16 /* BCD day 1..31 */
-#define FPGAREG_DAY_WIDTH 8
-#define FPGAREG_DAY_MASK 0x00FF0000
-#define FPGAREG_YEAR_SHIFT 0 /* BCD year 2001..9999*/
-#define FPGAREG_YEAR_WIDTH 16
-#define FPGAREG_YEAR_MASK 0x0000FFFF
-
/* FPGA core clock frequency in Hz (also input to UART) */
#define CONFIG_SYS_FPGAREG_FREQ IOADDR(0x0D020004) /* CPU clock frequency*/
@@ -166,17 +153,14 @@
#ifdef CONFIG_XTFPGA_LX60
# define CONFIG_SYS_FLASH_SIZE 0x0040000 /* 4MB */
-# define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */
# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */
# define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000)
#elif defined(CONFIG_XTFPGA_KC705)
# define CONFIG_SYS_FLASH_SIZE 0x8000000 /* 128MB */
-# define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
# define CONFIG_SYS_FLASH_BASE IOADDR(0x00000000)
#else
# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* 16MB */
-# define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
# define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */
# define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000)
#endif