dts: meson: Drop redundant GXL, GXM & AXG devicetree files

Since meson GXL, GXM & AXG based boards switched to using upstream DT,
so drop redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files
kept in arch/arm/dts directory for these boards.

Cc: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Viacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # khadas-vim3_android
Link: https://lore.kernel.org/r/20240329-u-boot-of-upstream-v2-3-2512ad3eb63d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

8 files changed, 0 insertions, 718 deletions

diff --git a/include/dt-bindings/gpio/meson-axg-gpio.h b/include/dt-bindings/gpio/meson-axg-gpio.h
deleted file mode 100644
index 25bb1fffa97..00000000000
--- a/include/dt-bindings/gpio/meson-axg-gpio.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- * Author: Xingyu Chen <xingyu.chen@amlogic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _DT_BINDINGS_MESON_AXG_GPIO_H
-#define _DT_BINDINGS_MESON_AXG_GPIO_H
-
-/* First GPIO chip */
-#define GPIOAO_0	0
-#define GPIOAO_1	1
-#define GPIOAO_2	2
-#define GPIOAO_3	3
-#define GPIOAO_4	4
-#define GPIOAO_5	5
-#define GPIOAO_6	6
-#define GPIOAO_7	7
-#define GPIOAO_8	8
-#define GPIOAO_9	9
-#define GPIOAO_10	10
-#define GPIOAO_11	11
-#define GPIOAO_12	12
-#define GPIOAO_13	13
-#define GPIO_TEST_N 14
-
-/* Second GPIO chip */
-#define GPIOZ_0		0
-#define GPIOZ_1		1
-#define GPIOZ_2		2
-#define GPIOZ_3		3
-#define GPIOZ_4		4
-#define GPIOZ_5		5
-#define GPIOZ_6		6
-#define GPIOZ_7		7
-#define GPIOZ_8		8
-#define GPIOZ_9		9
-#define GPIOZ_10	10
-#define BOOT_0		11
-#define BOOT_1		12
-#define BOOT_2		13
-#define BOOT_3		14
-#define BOOT_4		15
-#define BOOT_5		16
-#define BOOT_6		17
-#define BOOT_7		18
-#define BOOT_8		19
-#define BOOT_9		20
-#define BOOT_10		21
-#define BOOT_11		22
-#define BOOT_12		23
-#define BOOT_13		24
-#define BOOT_14		25
-#define GPIOA_0	    26
-#define GPIOA_1		27
-#define GPIOA_2		28
-#define GPIOA_3		29
-#define GPIOA_4		30
-#define GPIOA_5		31
-#define GPIOA_6		32
-#define GPIOA_7		33
-#define GPIOA_8		34
-#define GPIOA_9		35
-#define GPIOA_10	36
-#define GPIOA_11	37
-#define GPIOA_12	38
-#define GPIOA_13	39
-#define GPIOA_14	40
-#define GPIOA_15	41
-#define GPIOA_16	42
-#define GPIOA_17	43
-#define GPIOA_18	44
-#define GPIOA_19	45
-#define GPIOA_20	46
-#define GPIOX_0		47
-#define GPIOX_1		48
-#define GPIOX_2		49
-#define GPIOX_3		50
-#define GPIOX_4		51
-#define GPIOX_5		52
-#define GPIOX_6		53
-#define GPIOX_7		54
-#define GPIOX_8		55
-#define GPIOX_9		56
-#define GPIOX_10	57
-#define GPIOX_11	58
-#define GPIOX_12	59
-#define GPIOX_13	60
-#define GPIOX_14	61
-#define GPIOX_15	62
-#define GPIOX_16	63
-#define GPIOX_17	64
-#define GPIOX_18	65
-#define GPIOX_19	66
-#define GPIOX_20	67
-#define GPIOX_21	68
-#define GPIOX_22	69
-#define GPIOY_0		70
-#define GPIOY_1		71
-#define GPIOY_2		72
-#define GPIOY_3		73
-#define GPIOY_4		74
-#define GPIOY_5		75
-#define GPIOY_6		76
-#define GPIOY_7		77
-#define GPIOY_8		78
-#define GPIOY_9		79
-#define GPIOY_10	80
-#define GPIOY_11	81
-#define GPIOY_12	82
-#define GPIOY_13	83
-#define GPIOY_14	84
-#define GPIOY_15	85
-
-#endif /* _DT_BINDINGS_MESON_AXG_GPIO_H */
diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h
deleted file mode 100644
index 489c75b2764..00000000000
--- a/include/dt-bindings/gpio/meson-gxbb-gpio.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * GPIO definitions for Amlogic Meson GXBB SoCs
- *
- * Copyright (C) 2016 Endless Mobile, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H
-#define _DT_BINDINGS_MESON_GXBB_GPIO_H
-
-#define	GPIOAO_0	0
-#define	GPIOAO_1	1
-#define	GPIOAO_2	2
-#define	GPIOAO_3	3
-#define	GPIOAO_4	4
-#define	GPIOAO_5	5
-#define	GPIOAO_6	6
-#define	GPIOAO_7	7
-#define	GPIOAO_8	8
-#define	GPIOAO_9	9
-#define	GPIOAO_10	10
-#define	GPIOAO_11	11
-#define	GPIOAO_12	12
-#define	GPIOAO_13	13
-#define	GPIO_TEST_N	14
-
-#define	GPIOZ_0		0
-#define	GPIOZ_1		1
-#define	GPIOZ_2		2
-#define	GPIOZ_3		3
-#define	GPIOZ_4		4
-#define	GPIOZ_5		5
-#define	GPIOZ_6		6
-#define	GPIOZ_7		7
-#define	GPIOZ_8		8
-#define	GPIOZ_9		9
-#define	GPIOZ_10	10
-#define	GPIOZ_11	11
-#define	GPIOZ_12	12
-#define	GPIOZ_13	13
-#define	GPIOZ_14	14
-#define	GPIOZ_15	15
-#define	GPIOH_0		16
-#define	GPIOH_1		17
-#define	GPIOH_2		18
-#define	GPIOH_3		19
-#define	BOOT_0		20
-#define	BOOT_1		21
-#define	BOOT_2		22
-#define	BOOT_3		23
-#define	BOOT_4		24
-#define	BOOT_5		25
-#define	BOOT_6		26
-#define	BOOT_7		27
-#define	BOOT_8		28
-#define	BOOT_9		29
-#define	BOOT_10		30
-#define	BOOT_11		31
-#define	BOOT_12		32
-#define	BOOT_13		33
-#define	BOOT_14		34
-#define	BOOT_15		35
-#define	BOOT_16		36
-#define	BOOT_17		37
-#define	CARD_0		38
-#define	CARD_1		39
-#define	CARD_2		40
-#define	CARD_3		41
-#define	CARD_4		42
-#define	CARD_5		43
-#define	CARD_6		44
-#define	GPIODV_0	45
-#define	GPIODV_1	46
-#define	GPIODV_2	47
-#define	GPIODV_3	48
-#define	GPIODV_4	49
-#define	GPIODV_5	50
-#define	GPIODV_6	51
-#define	GPIODV_7	52
-#define	GPIODV_8	53
-#define	GPIODV_9	54
-#define	GPIODV_10	55
-#define	GPIODV_11	56
-#define	GPIODV_12	57
-#define	GPIODV_13	58
-#define	GPIODV_14	59
-#define	GPIODV_15	60
-#define	GPIODV_16	61
-#define	GPIODV_17	62
-#define	GPIODV_18	63
-#define	GPIODV_19	64
-#define	GPIODV_20	65
-#define	GPIODV_21	66
-#define	GPIODV_22	67
-#define	GPIODV_23	68
-#define	GPIODV_24	69
-#define	GPIODV_25	70
-#define	GPIODV_26	71
-#define	GPIODV_27	72
-#define	GPIODV_28	73
-#define	GPIODV_29	74
-#define	GPIOY_0		75
-#define	GPIOY_1		76
-#define	GPIOY_2		77
-#define	GPIOY_3		78
-#define	GPIOY_4		79
-#define	GPIOY_5		80
-#define	GPIOY_6		81
-#define	GPIOY_7		82
-#define	GPIOY_8		83
-#define	GPIOY_9		84
-#define	GPIOY_10	85
-#define	GPIOY_11	86
-#define	GPIOY_12	87
-#define	GPIOY_13	88
-#define	GPIOY_14	89
-#define	GPIOY_15	90
-#define	GPIOY_16	91
-#define	GPIOX_0		92
-#define	GPIOX_1		93
-#define	GPIOX_2		94
-#define	GPIOX_3		95
-#define	GPIOX_4		96
-#define	GPIOX_5		97
-#define	GPIOX_6		98
-#define	GPIOX_7		99
-#define	GPIOX_8		100
-#define	GPIOX_9		101
-#define	GPIOX_10	102
-#define	GPIOX_11	103
-#define	GPIOX_12	104
-#define	GPIOX_13	105
-#define	GPIOX_14	106
-#define	GPIOX_15	107
-#define	GPIOX_16	108
-#define	GPIOX_17	109
-#define	GPIOX_18	110
-#define	GPIOX_19	111
-#define	GPIOX_20	112
-#define	GPIOX_21	113
-#define	GPIOX_22	114
-#define	GPIOCLK_0	115
-#define	GPIOCLK_1	116
-#define	GPIOCLK_2	117
-#define	GPIOCLK_3	118
-
-#endif
diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h
deleted file mode 100644
index 0a001ae4827..00000000000
--- a/include/dt-bindings/gpio/meson-gxl-gpio.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * GPIO definitions for Amlogic Meson GXL SoCs
- *
- * Copyright (C) 2016 Endless Mobile, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXL_GPIO_H
-#define _DT_BINDINGS_MESON_GXL_GPIO_H
-
-#define	GPIOAO_0	0
-#define	GPIOAO_1	1
-#define	GPIOAO_2	2
-#define	GPIOAO_3	3
-#define	GPIOAO_4	4
-#define	GPIOAO_5	5
-#define	GPIOAO_6	6
-#define	GPIOAO_7	7
-#define	GPIOAO_8	8
-#define	GPIOAO_9	9
-#define	GPIO_TEST_N	10
-
-#define	GPIOZ_0		0
-#define	GPIOZ_1		1
-#define	GPIOZ_2		2
-#define	GPIOZ_3		3
-#define	GPIOZ_4		4
-#define	GPIOZ_5		5
-#define	GPIOZ_6		6
-#define	GPIOZ_7		7
-#define	GPIOZ_8		8
-#define	GPIOZ_9		9
-#define	GPIOZ_10	10
-#define	GPIOZ_11	11
-#define	GPIOZ_12	12
-#define	GPIOZ_13	13
-#define	GPIOZ_14	14
-#define	GPIOZ_15	15
-#define	GPIOH_0		16
-#define	GPIOH_1		17
-#define	GPIOH_2		18
-#define	GPIOH_3		19
-#define	GPIOH_4		20
-#define	GPIOH_5		21
-#define	GPIOH_6		22
-#define	GPIOH_7		23
-#define	GPIOH_8		24
-#define	GPIOH_9		25
-#define	BOOT_0		26
-#define	BOOT_1		27
-#define	BOOT_2		28
-#define	BOOT_3		29
-#define	BOOT_4		30
-#define	BOOT_5		31
-#define	BOOT_6		32
-#define	BOOT_7		33
-#define	BOOT_8		34
-#define	BOOT_9		35
-#define	BOOT_10		36
-#define	BOOT_11		37
-#define	BOOT_12		38
-#define	BOOT_13		39
-#define	BOOT_14		40
-#define	BOOT_15		41
-#define	CARD_0		42
-#define	CARD_1		43
-#define	CARD_2		44
-#define	CARD_3		45
-#define	CARD_4		46
-#define	CARD_5		47
-#define	CARD_6		48
-#define	GPIODV_0	49
-#define	GPIODV_1	50
-#define	GPIODV_2	51
-#define	GPIODV_3	52
-#define	GPIODV_4	53
-#define	GPIODV_5	54
-#define	GPIODV_6	55
-#define	GPIODV_7	56
-#define	GPIODV_8	57
-#define	GPIODV_9	58
-#define	GPIODV_10	59
-#define	GPIODV_11	60
-#define	GPIODV_12	61
-#define	GPIODV_13	62
-#define	GPIODV_14	63
-#define	GPIODV_15	64
-#define	GPIODV_16	65
-#define	GPIODV_17	66
-#define	GPIODV_18	67
-#define	GPIODV_19	68
-#define	GPIODV_20	69
-#define	GPIODV_21	70
-#define	GPIODV_22	71
-#define	GPIODV_23	72
-#define	GPIODV_24	73
-#define	GPIODV_25	74
-#define	GPIODV_26	75
-#define	GPIODV_27	76
-#define	GPIODV_28	77
-#define	GPIODV_29	78
-#define	GPIOX_0		79
-#define	GPIOX_1		80
-#define	GPIOX_2		81
-#define	GPIOX_3		82
-#define	GPIOX_4		83
-#define	GPIOX_5		84
-#define	GPIOX_6		85
-#define	GPIOX_7		86
-#define	GPIOX_8		87
-#define	GPIOX_9		88
-#define	GPIOX_10	89
-#define	GPIOX_11	90
-#define	GPIOX_12	91
-#define	GPIOX_13	92
-#define	GPIOX_14	93
-#define	GPIOX_15	94
-#define	GPIOX_16	95
-#define	GPIOX_17	96
-#define	GPIOX_18	97
-#define	GPIOCLK_0	98
-#define	GPIOCLK_1	99
-
-#endif
diff --git a/include/dt-bindings/power/meson-axg-power.h b/include/dt-bindings/power/meson-axg-power.h
deleted file mode 100644
index e5243884b24..00000000000
--- a/include/dt-bindings/power/meson-axg-power.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2020 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_AXG_POWER_H
-#define _DT_BINDINGS_MESON_AXG_POWER_H
-
-#define PWRC_AXG_VPU_ID			0
-#define PWRC_AXG_ETHERNET_MEM_ID	1
-#define PWRC_AXG_AUDIO_ID		2
-
-#endif
diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h
deleted file mode 100644
index 1262dac696c..00000000000
--- a/include/dt-bindings/power/meson-gxbb-power.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H
-#define _DT_BINDINGS_MESON_GXBB_POWER_H
-
-#define PWRC_GXBB_VPU_ID		0
-#define PWRC_GXBB_ETHERNET_MEM_ID	1
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h
deleted file mode 100644
index 0f2e0fe45ca..00000000000
--- a/include/dt-bindings/reset/amlogic,meson-axg-reset.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
-/*
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- *
- * Copyright (c) 2017 Amlogic, inc.
- * Author: Yixun Lan <yixun.lan@amlogic.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
-
-/*	RESET0					*/
-#define RESET_HIU			0
-#define RESET_PCIE_A			1
-#define RESET_PCIE_B			2
-#define RESET_DDR_TOP			3
-/*					4	*/
-#define RESET_VIU			5
-#define RESET_PCIE_PHY			6
-#define RESET_PCIE_APB			7
-/*					8	*/
-/*					9	*/
-#define RESET_VENC			10
-#define RESET_ASSIST			11
-/*					12	*/
-#define RESET_VCBUS			13
-/*					14	*/
-/*					15	*/
-#define RESET_GIC			16
-#define RESET_CAPB3_DECODE		17
-/*					18-21	*/
-#define RESET_SYS_CPU_CAPB3		22
-#define RESET_CBUS_CAPB3		23
-#define RESET_AHB_CNTL			24
-#define RESET_AHB_DATA			25
-#define RESET_VCBUS_CLK81		26
-#define RESET_MMC			27
-/*					28-31	*/
-/*	RESET1					*/
-/*					32	*/
-/*					33	*/
-#define RESET_USB_OTG			34
-#define RESET_DDR			35
-#define RESET_AO_RESET			36
-/*					37	*/
-#define RESET_AHB_SRAM			38
-/*					39	*/
-/*					40	*/
-#define RESET_DMA			41
-#define RESET_ISA			42
-#define RESET_ETHERNET			43
-/*					44	*/
-#define RESET_SD_EMMC_B			45
-#define RESET_SD_EMMC_C			46
-#define RESET_ROM_BOOT			47
-#define RESET_SYS_CPU_0			48
-#define RESET_SYS_CPU_1			49
-#define RESET_SYS_CPU_2			50
-#define RESET_SYS_CPU_3			51
-#define RESET_SYS_CPU_CORE_0		52
-#define RESET_SYS_CPU_CORE_1		53
-#define RESET_SYS_CPU_CORE_2		54
-#define RESET_SYS_CPU_CORE_3		55
-#define RESET_SYS_PLL_DIV		56
-#define RESET_SYS_CPU_AXI		57
-#define RESET_SYS_CPU_L2		58
-#define RESET_SYS_CPU_P			59
-#define RESET_SYS_CPU_MBIST		60
-/*					61-63	*/
-/*	RESET2					*/
-/*					64	*/
-/*					65	*/
-#define RESET_AUDIO			66
-/*					67	*/
-#define RESET_MIPI_HOST			68
-#define RESET_AUDIO_LOCKER		69
-#define RESET_GE2D			70
-/*					71-76	*/
-#define RESET_AO_CPU_RESET		77
-/*					78-95	*/
-/*	RESET3					*/
-#define RESET_RING_OSCILLATOR		96
-/*					97-127	*/
-/*	RESET4					*/
-/*					128	*/
-/*					129	*/
-#define RESET_MIPI_PHY			130
-/*					131-140	*/
-#define RESET_VENCL			141
-#define RESET_I2C_MASTER_2		142
-#define RESET_I2C_MASTER_1		143
-/*					144-159	*/
-/*	RESET5					*/
-/*					160-191	*/
-/*	RESET6					*/
-#define RESET_PERIPHS_GENERAL		192
-#define RESET_PERIPHS_SPICC		193
-/*					194	*/
-/*					195	*/
-#define RESET_PERIPHS_I2C_MASTER_0	196
-/*					197-200	*/
-#define RESET_PERIPHS_UART_0		201
-#define RESET_PERIPHS_UART_1		202
-/*					203-204	*/
-#define RESET_PERIPHS_SPI_0		205
-#define RESET_PERIPHS_I2C_MASTER_3	206
-/*					207-223	*/
-/*	RESET7					*/
-#define RESET_USB_DDR_0			224
-#define RESET_USB_DDR_1			225
-#define RESET_USB_DDR_2			226
-#define RESET_USB_DDR_3			227
-/*					228	*/
-#define RESET_DEVICE_MMC_ARB		229
-/*					230	*/
-#define RESET_VID_LOCK			231
-#define RESET_A9_DMC_PIPEL		232
-#define RESET_DMC_VPU_PIPEL		233
-/*					234-255	*/
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
deleted file mode 100644
index 883bfd3bcba..00000000000
--- a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-/*
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
-
-/*	RESET0					*/
-#define RESET_HIU			0
-/*					1	*/
-#define RESET_DOS_RESET			2
-#define RESET_DDR_TOP			3
-#define RESET_DCU_RESET			4
-#define RESET_VIU			5
-#define RESET_AIU			6
-#define RESET_VID_PLL_DIV		7
-/*					8	*/
-#define RESET_PMUX			9
-#define RESET_VENC			10
-#define RESET_ASSIST			11
-#define RESET_AFIFO2			12
-#define RESET_VCBUS			13
-/*					14	*/
-/*					15	*/
-#define RESET_GIC			16
-#define RESET_CAPB3_DECODE		17
-#define RESET_NAND_CAPB3		18
-#define RESET_HDMITX_CAPB3		19
-#define RESET_MALI_CAPB3		20
-#define RESET_DOS_CAPB3			21
-#define RESET_SYS_CPU_CAPB3		22
-#define RESET_CBUS_CAPB3		23
-#define RESET_AHB_CNTL			24
-#define RESET_AHB_DATA			25
-#define RESET_VCBUS_CLK81		26
-#define RESET_MMC			27
-#define RESET_MIPI_0			28
-#define RESET_MIPI_1			29
-#define RESET_MIPI_2			30
-#define RESET_MIPI_3			31
-/*	RESET1					*/
-#define RESET_CPPM			32
-#define RESET_DEMUX			33
-#define RESET_USB_OTG			34
-#define RESET_DDR			35
-#define RESET_AO_RESET			36
-#define RESET_BT656			37
-#define RESET_AHB_SRAM			38
-/*					39	*/
-#define RESET_PARSER			40
-#define RESET_BLKMV			41
-#define RESET_ISA			42
-#define RESET_ETHERNET			43
-#define RESET_SD_EMMC_A			44
-#define RESET_SD_EMMC_B			45
-#define RESET_SD_EMMC_C			46
-#define RESET_ROM_BOOT			47
-#define RESET_SYS_CPU_0			48
-#define RESET_SYS_CPU_1			49
-#define RESET_SYS_CPU_2			50
-#define RESET_SYS_CPU_3			51
-#define RESET_SYS_CPU_CORE_0		52
-#define RESET_SYS_CPU_CORE_1		53
-#define RESET_SYS_CPU_CORE_2		54
-#define RESET_SYS_CPU_CORE_3		55
-#define RESET_SYS_PLL_DIV		56
-#define RESET_SYS_CPU_AXI		57
-#define RESET_SYS_CPU_L2		58
-#define RESET_SYS_CPU_P			59
-#define RESET_SYS_CPU_MBIST		60
-#define RESET_ACODEC			61
-/*					62	*/
-/*					63	*/
-/*	RESET2					*/
-#define RESET_VD_RMEM			64
-#define RESET_AUDIN			65
-#define RESET_HDMI_TX			66
-/*					67	*/
-/*					68	*/
-/*					69	*/
-#define RESET_GE2D			70
-#define RESET_PARSER_REG		71
-#define RESET_PARSER_FETCH		72
-#define RESET_PARSER_CTL		73
-#define RESET_PARSER_TOP		74
-/*					75	*/
-/*					76	*/
-#define RESET_AO_CPU_RESET		77
-#define RESET_MALI			78
-#define RESET_HDMI_SYSTEM_RESET		79
-/*					80-95	*/
-/*	RESET3					*/
-#define RESET_RING_OSCILLATOR		96
-#define RESET_SYS_CPU			97
-#define RESET_EFUSE			98
-#define RESET_SYS_CPU_BVCI		99
-#define RESET_AIFIFO			100
-#define RESET_TVFE			101
-#define RESET_AHB_BRIDGE_CNTL		102
-/*					103	*/
-#define RESET_AUDIO_DAC			104
-#define RESET_DEMUX_TOP			105
-#define RESET_DEMUX_DES			106
-#define RESET_DEMUX_S2P_0		107
-#define RESET_DEMUX_S2P_1		108
-#define RESET_DEMUX_RESET_0		109
-#define RESET_DEMUX_RESET_1		110
-#define RESET_DEMUX_RESET_2		111
-/*					112-127	*/
-/*	RESET4					*/
-/*					128	*/
-/*					129	*/
-/*					130	*/
-/*					131	*/
-#define RESET_DVIN_RESET		132
-#define RESET_RDMA			133
-#define RESET_VENCI			134
-#define RESET_VENCP			135
-/*					136	*/
-#define RESET_VDAC			137
-#define RESET_RTC			138
-/*					139	*/
-#define RESET_VDI6			140
-#define RESET_VENCL			141
-#define RESET_I2C_MASTER_2		142
-#define RESET_I2C_MASTER_1		143
-/*					144-159	*/
-/*	RESET5					*/
-/*					160-191	*/
-/*	RESET6					*/
-#define RESET_PERIPHS_GENERAL		192
-#define RESET_PERIPHS_SPICC		193
-#define RESET_PERIPHS_SMART_CARD	194
-#define RESET_PERIPHS_SAR_ADC		195
-#define RESET_PERIPHS_I2C_MASTER_0	196
-#define RESET_SANA			197
-/*					198	*/
-#define RESET_PERIPHS_STREAM_INTERFACE	199
-#define RESET_PERIPHS_SDIO		200
-#define RESET_PERIPHS_UART_0		201
-#define RESET_PERIPHS_UART_1_2		202
-#define RESET_PERIPHS_ASYNC_0		203
-#define RESET_PERIPHS_ASYNC_1		204
-#define RESET_PERIPHS_SPI_0		205
-#define RESET_PERIPHS_SDHC		206
-#define RESET_UART_SLIP			207
-/*					208-223	*/
-/*	RESET7					*/
-#define RESET_USB_DDR_0			224
-#define RESET_USB_DDR_1			225
-#define RESET_USB_DDR_2			226
-#define RESET_USB_DDR_3			227
-/*					228	*/
-#define RESET_DEVICE_MMC_ARB		229
-/*					230	*/
-#define RESET_VID_LOCK			231
-#define RESET_A9_DMC_PIPEL		232
-/*					233-255	*/
-
-#endif
diff --git a/include/dt-bindings/sound/meson-aiu.h b/include/dt-bindings/sound/meson-aiu.h
deleted file mode 100644
index 1051b8af298..00000000000
--- a/include/dt-bindings/sound/meson-aiu.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_AIU_H
-#define __DT_MESON_AIU_H
-
-#define AIU_CPU			0
-#define AIU_HDMI		1
-#define AIU_ACODEC		2
-
-#define CPU_I2S_FIFO		0
-#define CPU_SPDIF_FIFO		1
-#define CPU_I2S_ENCODER		2
-#define CPU_SPDIF_ENCODER	3
-
-#define CTRL_I2S		0
-#define CTRL_PCM		1
-#define CTRL_OUT		2
-
-#endif /* __DT_MESON_AIU_H */