dts: meson: Drop redundant G12A, G12B & SM1 devicetree files

Since meson G12A, G12B & SM1 based boards switched to using upstream DT,
so drop redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files
kept in arch/arm/dts directory for these boards.

Cc: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Viacheslav Bocharov <adeep@lexina.in>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # khadas-vim3_android
Link: https://lore.kernel.org/r/20240329-u-boot-of-upstream-v2-5-2512ad3eb63d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

8 files changed, 0 insertions, 377 deletions

diff --git a/include/dt-bindings/gpio/meson-g12a-gpio.h b/include/dt-bindings/gpio/meson-g12a-gpio.h
deleted file mode 100644
index f7bd69350d1..00000000000
--- a/include/dt-bindings/gpio/meson-g12a-gpio.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- * Author: Xingyu Chen <xingyu.chen@amlogic.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_G12A_GPIO_H
-#define _DT_BINDINGS_MESON_G12A_GPIO_H
-
-/* First GPIO chip */
-#define GPIOAO_0	0
-#define GPIOAO_1	1
-#define GPIOAO_2	2
-#define GPIOAO_3	3
-#define GPIOAO_4	4
-#define GPIOAO_5	5
-#define GPIOAO_6	6
-#define GPIOAO_7	7
-#define GPIOAO_8	8
-#define GPIOAO_9	9
-#define GPIOAO_10	10
-#define GPIOAO_11	11
-#define GPIOE_0		12
-#define GPIOE_1		13
-#define GPIOE_2		14
-
-/* Second GPIO chip */
-#define GPIOZ_0		0
-#define GPIOZ_1		1
-#define GPIOZ_2		2
-#define GPIOZ_3		3
-#define GPIOZ_4		4
-#define GPIOZ_5		5
-#define GPIOZ_6		6
-#define GPIOZ_7		7
-#define GPIOZ_8		8
-#define GPIOZ_9		9
-#define GPIOZ_10	10
-#define GPIOZ_11	11
-#define GPIOZ_12	12
-#define GPIOZ_13	13
-#define GPIOZ_14	14
-#define GPIOZ_15	15
-#define GPIOH_0		16
-#define GPIOH_1		17
-#define GPIOH_2		18
-#define GPIOH_3		19
-#define GPIOH_4		20
-#define GPIOH_5		21
-#define GPIOH_6		22
-#define GPIOH_7		23
-#define GPIOH_8		24
-#define BOOT_0		25
-#define BOOT_1		26
-#define BOOT_2		27
-#define BOOT_3		28
-#define BOOT_4		29
-#define BOOT_5		30
-#define BOOT_6		31
-#define BOOT_7		32
-#define BOOT_8		33
-#define BOOT_9		34
-#define BOOT_10		35
-#define BOOT_11		36
-#define BOOT_12		37
-#define BOOT_13		38
-#define BOOT_14		39
-#define BOOT_15		40
-#define GPIOC_0		41
-#define GPIOC_1		42
-#define GPIOC_2		43
-#define GPIOC_3		44
-#define GPIOC_4		45
-#define GPIOC_5		46
-#define GPIOC_6		47
-#define GPIOC_7		48
-#define GPIOA_0		49
-#define GPIOA_1		50
-#define GPIOA_2		51
-#define GPIOA_3		52
-#define GPIOA_4		53
-#define GPIOA_5		54
-#define GPIOA_6		55
-#define GPIOA_7		56
-#define GPIOA_8		57
-#define GPIOA_9		58
-#define GPIOA_10	59
-#define GPIOA_11	60
-#define GPIOA_12	61
-#define GPIOA_13	62
-#define GPIOA_14	63
-#define GPIOA_15	64
-#define GPIOX_0		65
-#define GPIOX_1		66
-#define GPIOX_2		67
-#define GPIOX_3		68
-#define GPIOX_4		69
-#define GPIOX_5		70
-#define GPIOX_6		71
-#define GPIOX_7		72
-#define GPIOX_8		73
-#define GPIOX_9		74
-#define GPIOX_10	75
-#define GPIOX_11	76
-#define GPIOX_12	77
-#define GPIOX_13	78
-#define GPIOX_14	79
-#define GPIOX_15	80
-#define GPIOX_16	81
-#define GPIOX_17	82
-#define GPIOX_18	83
-#define GPIOX_19	84
-
-#endif /* _DT_BINDINGS_MESON_G12A_GPIO_H */
diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
deleted file mode 100644
index bb5e67a842d..00000000000
--- a/include/dt-bindings/power/meson-g12a-power.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_G12A_POWER_H
-#define _DT_BINDINGS_MESON_G12A_POWER_H
-
-#define PWRC_G12A_VPU_ID		0
-#define PWRC_G12A_ETH_ID		1
-
-#endif
diff --git a/include/dt-bindings/power/meson-sm1-power.h b/include/dt-bindings/power/meson-sm1-power.h
deleted file mode 100644
index a020ab00c13..00000000000
--- a/include/dt-bindings/power/meson-sm1-power.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_SM1_POWER_H
-#define _DT_BINDINGS_MESON_SM1_POWER_H
-
-#define PWRC_SM1_VPU_ID		0
-#define PWRC_SM1_NNA_ID		1
-#define PWRC_SM1_USB_ID		2
-#define PWRC_SM1_PCIE_ID	3
-#define PWRC_SM1_GE2D_ID	4
-#define PWRC_SM1_AUDIO_ID	5
-#define PWRC_SM1_ETH_ID		6
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
deleted file mode 100644
index 1ef807856cb..00000000000
--- a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
- *
- * Copyright (c) 2018 Baylibre SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
-#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
-
-#define AXG_ARB_TODDR_A	0
-#define AXG_ARB_TODDR_B	1
-#define AXG_ARB_TODDR_C	2
-#define AXG_ARB_FRDDR_A	3
-#define AXG_ARB_FRDDR_B	4
-#define AXG_ARB_FRDDR_C	5
-#define AXG_ARB_TODDR_D	6
-#define AXG_ARB_FRDDR_D	7
-
-#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
deleted file mode 100644
index f805129ca7a..00000000000
--- a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2019 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
-
-#define AUD_RESET_PDM		0
-#define AUD_RESET_TDMIN_A	1
-#define AUD_RESET_TDMIN_B	2
-#define AUD_RESET_TDMIN_C	3
-#define AUD_RESET_TDMIN_LB	4
-#define AUD_RESET_LOOPBACK	5
-#define AUD_RESET_TODDR_A	6
-#define AUD_RESET_TODDR_B	7
-#define AUD_RESET_TODDR_C	8
-#define AUD_RESET_FRDDR_A	9
-#define AUD_RESET_FRDDR_B	10
-#define AUD_RESET_FRDDR_C	11
-#define AUD_RESET_TDMOUT_A	12
-#define AUD_RESET_TDMOUT_B	13
-#define AUD_RESET_TDMOUT_C	14
-#define AUD_RESET_SPDIFOUT	15
-#define AUD_RESET_SPDIFOUT_B	16
-#define AUD_RESET_SPDIFIN	17
-#define AUD_RESET_EQDRC		18
-#define AUD_RESET_RESAMPLE	19
-#define AUD_RESET_DDRARB	20
-#define AUD_RESET_POWDET	21
-#define AUD_RESET_TORAM		22
-#define AUD_RESET_TOACODEC	23
-#define AUD_RESET_TOHDMITX	24
-#define AUD_RESET_CLKTREE	25
-
-/* SM1 added resets */
-#define AUD_RESET_RESAMPLE_B	26
-#define AUD_RESET_TOVAD		27
-#define AUD_RESET_LOCKER	28
-#define AUD_RESET_SPDIFIN_LB	29
-#define AUD_RESET_FRATV		30
-#define AUD_RESET_FRHDMIRX	31
-#define AUD_RESET_FRDDR_D	32
-#define AUD_RESET_TODDR_D	33
-#define AUD_RESET_LOOPBACK_B	34
-#define AUD_RESET_EARCTX	35
-#define AUD_RESET_EARCRX	36
-#define AUD_RESET_FRDDR_E	37
-#define AUD_RESET_TODDR_E	38
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
deleted file mode 100644
index 6d487c5eba2..00000000000
--- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
-/*
- * Copyright (c) 2019 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H
-
-/*	RESET0					*/
-#define RESET_HIU			0
-/*					1	*/
-#define RESET_DOS			2
-/*					3-4	*/
-#define RESET_VIU			5
-#define RESET_AFIFO			6
-#define RESET_VID_PLL_DIV		7
-/*					8-9	*/
-#define RESET_VENC			10
-#define RESET_ASSIST			11
-#define RESET_PCIE_CTRL_A		12
-#define RESET_VCBUS			13
-#define RESET_PCIE_PHY			14
-#define RESET_PCIE_APB			15
-#define RESET_GIC			16
-#define RESET_CAPB3_DECODE		17
-/*					18	*/
-#define RESET_HDMITX_CAPB3		19
-#define RESET_DVALIN_CAPB3		20
-#define RESET_DOS_CAPB3			21
-/*					22	*/
-#define RESET_CBUS_CAPB3		23
-#define RESET_AHB_CNTL			24
-#define RESET_AHB_DATA			25
-#define RESET_VCBUS_CLK81		26
-/*					27-31	*/
-/*	RESET1					*/
-/*					32	*/
-#define RESET_DEMUX			33
-#define RESET_USB			34
-#define RESET_DDR			35
-/*					36	*/
-#define RESET_BT656			37
-#define RESET_AHB_SRAM			38
-/*					39	*/
-#define RESET_PARSER			40
-/*					41	*/
-#define RESET_ISA			42
-#define RESET_ETHERNET			43
-#define RESET_SD_EMMC_A			44
-#define RESET_SD_EMMC_B			45
-#define RESET_SD_EMMC_C			46
-/*					47	*/
-#define RESET_USB_PHY20			48
-#define RESET_USB_PHY21			49
-/*					50-60	*/
-#define RESET_AUDIO_CODEC		61
-/*					62-63	*/
-/*	RESET2					*/
-/*					64	*/
-#define RESET_AUDIO			65
-#define RESET_HDMITX_PHY		66
-/*					67	*/
-#define RESET_MIPI_DSI_HOST		68
-#define RESET_ALOCKER			69
-#define RESET_GE2D			70
-#define RESET_PARSER_REG		71
-#define RESET_PARSER_FETCH		72
-#define RESET_CTL			73
-#define RESET_PARSER_TOP		74
-/*					75-77	*/
-#define RESET_DVALIN			78
-#define RESET_HDMITX			79
-/*					80-95	*/
-/*	RESET3					*/
-/*					96-95	*/
-#define RESET_DEMUX_TOP			105
-#define RESET_DEMUX_DES_PL		106
-#define RESET_DEMUX_S2P_0		107
-#define RESET_DEMUX_S2P_1		108
-#define RESET_DEMUX_0			109
-#define RESET_DEMUX_1			110
-#define RESET_DEMUX_2			111
-/*					112-127	*/
-/*	RESET4					*/
-/*					128-129	*/
-#define RESET_MIPI_DSI_PHY		130
-/*					131-132	*/
-#define RESET_RDMA			133
-#define RESET_VENCI			134
-#define RESET_VENCP			135
-/*					136	*/
-#define RESET_VDAC			137
-/*					138-139 */
-#define RESET_VDI6			140
-#define RESET_VENCL			141
-#define RESET_I2C_M1			142
-#define RESET_I2C_M2			143
-/*					144-159	*/
-/*	RESET5					*/
-/*					160-191	*/
-/*	RESET6					*/
-#define RESET_GEN			192
-#define RESET_SPICC0			193
-#define RESET_SC			194
-#define RESET_SANA_3			195
-#define RESET_I2C_M0			196
-#define RESET_TS_PLL			197
-#define RESET_SPICC1			198
-#define RESET_STREAM			199
-#define RESET_TS_CPU			200
-#define RESET_UART0			201
-#define RESET_UART1_2			202
-#define RESET_ASYNC0			203
-#define RESET_ASYNC1			204
-#define RESET_SPIFC0			205
-#define RESET_I2C_M3			206
-/*					207-223	*/
-/*	RESET7					*/
-#define RESET_USB_DDR_0			224
-#define RESET_USB_DDR_1			225
-#define RESET_USB_DDR_2			226
-#define RESET_USB_DDR_3			227
-#define RESET_TS_GPU			228
-#define RESET_DEVICE_MMC_ARB		229
-#define RESET_DVALIN_DMC_PIPL		230
-#define RESET_VID_LOCK			231
-#define RESET_NIC_DMC_PIPL		232
-#define RESET_DMC_VPU_PIPL		233
-#define RESET_GE2D_DMC_PIPL		234
-#define RESET_HCODEC_DMC_PIPL		235
-#define RESET_WAVE420_DMC_PIPL		236
-#define RESET_HEVCF_DMC_PIPL		237
-/*					238-255	*/
-
-#endif
diff --git a/include/dt-bindings/sound/meson-g12a-toacodec.h b/include/dt-bindings/sound/meson-g12a-toacodec.h
deleted file mode 100644
index 69d7a75592a..00000000000
--- a/include/dt-bindings/sound/meson-g12a-toacodec.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_G12A_TOACODEC_H
-#define __DT_MESON_G12A_TOACODEC_H
-
-#define TOACODEC_IN_A	0
-#define TOACODEC_IN_B	1
-#define TOACODEC_IN_C	2
-#define TOACODEC_OUT	3
-
-#endif /* __DT_MESON_G12A_TOACODEC_H */
diff --git a/include/dt-bindings/sound/meson-g12a-tohdmitx.h b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
deleted file mode 100644
index c5e1f48d30d..00000000000
--- a/include/dt-bindings/sound/meson-g12a-tohdmitx.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_G12A_TOHDMITX_H
-#define __DT_MESON_G12A_TOHDMITX_H
-
-#define TOHDMITX_I2S_IN_A	0
-#define TOHDMITX_I2S_IN_B	1
-#define TOHDMITX_I2S_IN_C	2
-#define TOHDMITX_I2S_OUT	3
-#define TOHDMITX_SPDIF_IN_A	4
-#define TOHDMITX_SPDIF_IN_B	5
-#define TOHDMITX_SPDIF_OUT	6
-
-#endif /* __DT_MESON_G12A_TOHDMITX_H */