diff options
| author | Andre Przywara | 2023-05-15 14:52:14 +0100 |
|---|---|---|
| committer | Tom Rini | 2023-05-31 12:31:47 -0400 |
| commit | a179217e68e5c0c91004b1084e04091a80a6bb7e (patch) | |
| tree | bfb5ee915ef612338a9d4730737ad8e4d39ce29b /include/faraday | |
| parent | 081b160aa399f78e2bee54e4b59bd62862b22b68 (diff) | |
faraday: remove orphaned header file
Commit 11232139e399 ("nds32: Remove the architecture") removed the nds32
architecture, and with it the last user of the Faraday AHB controller
header file.
Consequently remove that header file as well.
This was found because the inclusion guard was misspelled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/faraday')
| -rw-r--r-- | include/faraday/ftahbc020s.h | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/include/faraday/ftahbc020s.h b/include/faraday/ftahbc020s.h deleted file mode 100644 index e628156c151..00000000000 --- a/include/faraday/ftahbc020s.h +++ /dev/null @@ -1,46 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Andes Technology Corporation - * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> - */ - -/* FTAHBC020S - AHB Controller (Arbiter/Decoder) definitions */ -#ifndef __FTAHBC020S_H -#define __FTAHBC202S_H - -/* Registers Offsets */ - -/* - * AHB Slave BSR, offset: n * 4, n=0~31 - */ -#ifndef __ASSEMBLY__ -struct ftahbc02s { - unsigned int s_bsr[32]; /* 0x00-0x7c - Slave n Base/Size Reg */ - unsigned int pcr; /* 0x80 - Priority Ctrl Reg */ - unsigned int tcrg; /* 0x84 - Transfer Ctrl Reg */ - unsigned int cr; /* 0x88 - Ctrl Reg */ -}; -#endif /* __ASSEMBLY__ */ - -/* - * FTAHBC020S_SLAVE_BSR - Slave n Base / Size Register - */ -#define FTAHBC020S_SLAVE_BSR_BASE(x) (((x) & 0xfff) << 20) -#define FTAHBC020S_SLAVE_BSR_SIZE(x) (((x) & 0xf) << 16) -/* The value of b(16:19)SLAVE_BSR_SIZE: 1M-2048M, must be power of 2 */ -#define FTAHBC020S_BSR_SIZE(x) (ffs(x) - 1) /* size of Addr Space */ - -/* - * FTAHBC020S_PCR - Priority Control Register - */ -#define FTAHBC020S_PCR_PLEVEL_(x) (1 << (x)) /* x: 1-15 */ - -/* - * FTAHBC020S_CR - Interrupt Control Register - */ -#define FTAHBC020S_CR_INTSTS (1 << 24) -#define FTAHBC020S_CR_RESP(x) (((x) & 0x3) << 20) -#define FTAHBC020S_CR_INTSMASK (1 << 16) -#define FTAHBC020S_CR_REMAP (1 << 0) - -#endif /* __FTAHBC020S_H */ |