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authorMarek Vasut2018-05-12 11:56:10 +0200
committerMarek Vasut2018-05-18 10:30:45 +0200
commit19c8fc77e1d3ff45d3ea60e4355039a3a54d4a93 (patch)
tree75705333b8024ffdc3cc0d7aadc293864d96a253 /include/fdtdec.h
parent233719cc40b5a00f37949d4173c190edcb4491a1 (diff)
fdt: Add another Altera Arria10 clock init compatible
The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'include/fdtdec.h')
-rw-r--r--include/fdtdec.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5456a17d1a7..c15b2a04a7a 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -160,6 +160,7 @@ enum fdt_compat_id {
COMPAT_ALTERA_SOCFPGA_F2SDR2, /* SoCFPGA fpga2SDRAM2 bridge */
COMPAT_ALTERA_SOCFPGA_FPGA0, /* SOCFPGA FPGA manager */
COMPAT_ALTERA_SOCFPGA_NOC, /* SOCFPGA Arria 10 NOC */
+ COMPAT_ALTERA_SOCFPGA_CLK_INIT, /* SOCFPGA Arria 10 clk init */
COMPAT_COUNT,
};