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| author | Dinh Nguyen | 2015-11-02 17:11:21 -0600 |
|---|---|---|
| committer | Marek Vasut | 2015-11-03 17:32:16 +0100 |
| commit | c624d07f3ff7ae7d29672bab189d2aeb99c63a95 (patch) | |
| tree | d1ace21fa5e8986683e6fbb282a8af07575869c0 /include/fdtdec.h | |
| parent | 96d59e9d6aa74e35c63dc74da10e41f8ba0f6de4 (diff) | |
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines
The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'include/fdtdec.h')
0 files changed, 0 insertions, 0 deletions