diff options
| author | Tom Rini | 2023-01-10 11:19:45 -0500 |
|---|---|---|
| committer | Tom Rini | 2023-01-20 12:27:24 -0500 |
| commit | 6e7df1d151a7a127caf3b62ff6dfc003fc2aefcd (patch) | |
| tree | ae38e9dcf468b2e4e58293561fae87895d9b549f /include/fsl_usb.h | |
| parent | ad242344681f6a0076a6bf100aa83ac9ecbea355 (diff) | |
global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks. Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/fsl_usb.h')
| -rw-r--r-- | include/fsl_usb.h | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/include/fsl_usb.h b/include/fsl_usb.h index a37a6e51b6f..1abd1e5e57a 100644 --- a/include/fsl_usb.h +++ b/include/fsl_usb.h @@ -40,21 +40,21 @@ struct ccsr_usb_phy { u8 res_dc[0x334]; }; -#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0) -#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1) -#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1) -#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0) -#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1) +#define CFG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0) +#define CFG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1) +#define CFG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1) +#define CFG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0) +#define CFG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1) #ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK -#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK (5 << 4) -#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK (6 << 16) -#define CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN (1 << 20) +#define CFG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK (5 << 4) +#define CFG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK (6 << 16) +#define CFG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN (1 << 20) #endif -#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4) -#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16) -#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21) -#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN (1 << 7) -#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK (3 << 4) +#define CFG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4) +#define CFG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16) +#define CFG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21) +#define CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN (1 << 7) +#define CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK (3 << 4) #define INC_DCNT_THRESHOLD_25MV (0 << 4) #define INC_DCNT_THRESHOLD_50MV (1 << 4) @@ -71,14 +71,14 @@ struct ccsr_usb_phy { u32 usb_enable_override; u8 res[0xe4]; }; -#define CONFIG_SYS_FSL_USB_HS_DISCNCT_INC (3 << 22) -#define CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL (1 << 20) -#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 13 -#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 16 -#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 0 -#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 3 -#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1 -#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07 +#define CFG_SYS_FSL_USB_HS_DISCNCT_INC (3 << 22) +#define CFG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL (1 << 20) +#define CFG_SYS_FSL_USB_SQUELCH_PROG_WR_0 13 +#define CFG_SYS_FSL_USB_SQUELCH_PROG_WR_3 16 +#define CFG_SYS_FSL_USB_SQUELCH_PROG_RD_0 0 +#define CFG_SYS_FSL_USB_SQUELCH_PROG_RD_3 3 +#define CFG_SYS_FSL_USB_ENABLE_OVERRIDE 1 +#define CFG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07 #endif /* USB Erratum Checking code */ |