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authorTom Rini2021-09-30 11:29:41 -0400
committerTom Rini2021-09-30 11:29:41 -0400
commit8bef03683623d6a7adfff1f859ed44fad9e92ed7 (patch)
treebe2734e3581e083ce199230c259a192914651bff /include/linux
parentc8988efc884c680eb4f34295df6689a7e312c15d (diff)
parentdced079c53b283e15f04282f405de410a9be584d (diff)
Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.01-rc1 zynq: - Enable capsule update for qspi and mmc - Update zed DT qspi compatible string zynqmp: - Add missing modeboot for EMMC - Add missing nand DT properties - List all eeproms for SC on vck190 - Add vck190 SC psu_init clk: - Handle only GATE type clock for Versal watchdog: - Update versal driver to handle system reset
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mtd/spi-nor.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 7ddc4ba2bf2..4ceeae623de 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -7,6 +7,7 @@
#ifndef __LINUX_MTD_SPI_NOR_H
#define __LINUX_MTD_SPI_NOR_H
+#include <mtd.h>
#include <linux/bitops.h>
#include <linux/mtd/cfi.h>
#include <linux/mtd/mtd.h>
@@ -561,6 +562,7 @@ struct spi_nor {
int (*ready)(struct spi_nor *nor);
void *priv;
+ char mtd_name[MTD_NAME_SIZE(MTD_DEV_TYPE_NOR)];
/* Compatibility for spi_flash, remove once sf layer is merged with mtd */
const char *name;
u32 size;