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authorTom Rini2021-09-30 11:29:41 -0400
committerTom Rini2021-09-30 11:29:41 -0400
commit8bef03683623d6a7adfff1f859ed44fad9e92ed7 (patch)
treebe2734e3581e083ce199230c259a192914651bff /include/mtd
parentc8988efc884c680eb4f34295df6689a7e312c15d (diff)
parentdced079c53b283e15f04282f405de410a9be584d (diff)
Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.01-rc1 zynq: - Enable capsule update for qspi and mmc - Update zed DT qspi compatible string zynqmp: - Add missing modeboot for EMMC - Add missing nand DT properties - List all eeproms for SC on vck190 - Add vck190 SC psu_init clk: - Handle only GATE type clock for Versal watchdog: - Update versal driver to handle system reset
Diffstat (limited to 'include/mtd')
-rw-r--r--include/mtd/cfi_flash.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
index 4963c89642f..a1af6fc200f 100644
--- a/include/mtd/cfi_flash.h
+++ b/include/mtd/cfi_flash.h
@@ -157,11 +157,17 @@ struct cfi_pri_hdr {
* Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined
*/
#if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
-#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
+/* map to cfi_flash_num_flash_banks only when supported */
+#if IS_ENABLED(CONFIG_FLASH_CFI_DRIVER) && \
+ (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD_SUPPORT))
+#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks)
/* board code can update this variable before CFI detection */
extern int cfi_flash_num_flash_banks;
#else
+#define CONFIG_SYS_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
+#endif
+#else
#define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
#endif