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authorSoren Brinkmann2016-09-29 11:44:41 -0700
committerMichal Simek2016-11-15 15:28:05 +0100
commit0cba6abbba5c0bd5c80e652c35d0bd74e644a49e (patch)
treee8f1197d4d81af1511dd360fa04bf5aa1ec8fac2 /include/zynqmppl.h
parent05c59d0bc83f28888e5f2cc11b679a721605a46b (diff)
ARM64: zynqmp: Adjust to new SMC interface to get silicon version
The new FW interface returns the IDCODE and version register, leaving extracting bitfields to the caller. Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/zynqmppl.h')
-rw-r--r--include/zynqmppl.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 542ace9a03b..fb5200ec84a 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -16,6 +16,12 @@
#define ZYNQMP_FPGA_OP_LOAD (1 << 1)
#define ZYNQMP_FPGA_OP_DONE (1 << 2)
+#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT 15
+#define ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK (0xf << \
+ ZYNQMP_CSU_IDCODE_DEVICE_CODE_SHIFT)
+#define ZYNQMP_CSU_IDCODE_SVD_SHIFT 12
+#define ZYNQMP_CSU_IDCODE_SVD_MASK (0xe << ZYNQMP_CSU_IDCODE_SVD_SHIFT)
+
extern struct xilinx_fpga_op zynqmp_op;
#define XILINX_ZYNQMP_DESC \