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authorMichal Simek2013-06-17 13:54:07 +0200
committerMichal Simek2013-08-12 08:01:50 +0200
commitfd2b10b6d6a0d5e94d6b34faa634e9722a5465a8 (patch)
tree26aa1e0b4fd76f10565d3b1ca163a8cc20cd04d0 /include/zynqpl.h
parenta78dac79ede7fbb4c9e816abc879655540c3f076 (diff)
fpga: zynqpl: Add support for zc7100 device.
- Add support for zc7100 device. - FPGA programming on few of the SOC(zc7100) takes more than 1sec, hence increased the program time by 4sec to sync' all soc's. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/zynqpl.h')
-rw-r--r--include/zynqpl.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/zynqpl.h b/include/zynqpl.h
index f8211cdba29..6107cbf3a5a 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -20,12 +20,14 @@ extern int zynq_info(Xilinx_desc *desc);
#define XILINX_ZYNQ_7020 0x7
#define XILINX_ZYNQ_7030 0xc
#define XILINX_ZYNQ_7045 0x11
+#define XILINX_ZYNQ_7100 0x16
/* Device Image Sizes */
#define XILINX_XC7Z010_SIZE 16669920/8
#define XILINX_XC7Z020_SIZE 32364512/8
#define XILINX_XC7Z030_SIZE 47839328/8
#define XILINX_XC7Z045_SIZE 106571232/8
+#define XILINX_XC7Z100_SIZE 139330784/8
/* Descriptor Macros */
#define XILINX_XC7Z010_DESC(cookie) \
@@ -40,4 +42,7 @@ extern int zynq_info(Xilinx_desc *desc);
#define XILINX_XC7Z045_DESC(cookie) \
{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" }
+#define XILINX_XC7Z100_DESC(cookie) \
+{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, "7z100" }
+
#endif /* _ZYNQPL_H_ */