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authorSuneel Garapati2020-07-17 08:06:22 +0200
committerTom Rini2020-07-17 10:47:19 -0400
commit21fc5a16855602b2fd4b39e40679f854101a0fa3 (patch)
treebbb554b1128dc15453a91fc50408446da2e0ddd2 /include
parent4d288dcd4c8059a3d6dbaeb8a27030366eb27d89 (diff)
include: pci_ids: Add Cavium devices
Add VendorID and DeviceID for supported devices on OcteonTX/TX2 platforms. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/pci_ids.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/pci_ids.h b/include/pci_ids.h
index bd59578ccb9..7ecedc7f04c 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2360,6 +2360,24 @@
#define PCI_DEVICE_ID_ALTIMA_AC9100 0x03ea
#define PCI_DEVICE_ID_ALTIMA_AC1003 0x03eb
+#define PCI_VENDOR_ID_CAVIUM 0x177d
+#define PCI_DEVICE_ID_CAVIUM_GPIO 0xa00a
+#define PCI_DEVICE_ID_CAVIUM_MPI 0xa00b
+#define PCI_DEVICE_ID_CAVIUM_EMMC 0xa010
+#define PCI_DEVICE_ID_CAVIUM_TWSI 0xa012
+#define PCI_DEVICE_ID_CAVIUM_SATA 0xa01c
+#define PCI_DEVICE_ID_CAVIUM_NIC 0xa01e
+#define PCI_DEVICE_ID_CAVIUM_BGX 0xa026
+#define PCI_DEVICE_ID_CAVIUM_SMI 0xa02b
+#define PCI_DEVICE_ID_CAVIUM_NICVF 0xa034
+#define PCI_DEVICE_ID_CAVIUM_BCH 0xa043
+#define PCI_DEVICE_ID_CAVIUM_BCHVF 0xa044
+#define PCI_DEVICE_ID_CAVIUM_NDF 0xa04f
+#define PCI_DEVICE_ID_CAVIUM_RGX 0xa054
+#define PCI_DEVICE_ID_CAVIUM_CGX 0xa059
+#define PCI_DEVICE_ID_CAVIUM_RVU_PF 0xa063
+#define PCI_DEVICE_ID_CAVIUM_RVU_AF 0xa065
+
#define PCI_VENDOR_ID_BELKIN 0x1799
#define PCI_DEVICE_ID_BELKIN_F5D7010V7 0x701f