diff options
author | Johan Jonker | 2022-04-16 17:09:47 +0200 |
---|---|---|
committer | Kever Yang | 2022-04-18 11:25:13 +0800 |
commit | 33f4750783080302afd8f00bb07bd18d6e94f073 (patch) | |
tree | e4ed9ca8aa73f712676b6db8adaf0825be8ecd4e /include | |
parent | 0034f1da5ae18cb21eb2012b1e175147118834cf (diff) |
rockchip: rk3066: add core support
Add the core architecture code for the rk3066.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/mk808.h | 9 | ||||
-rw-r--r-- | include/configs/rk3066_common.h | 47 |
2 files changed, 56 insertions, 0 deletions
diff --git a/include/configs/mk808.h b/include/configs/mk808.h new file mode 100644 index 00000000000..e2ab2b512c8 --- /dev/null +++ b/include/configs/mk808.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define ROCKCHIP_DEVICE_SETTINGS +#include <configs/rk3066_common.h> + +#endif diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h new file mode 100644 index 00000000000..be7d644e1e5 --- /dev/null +++ b/include/configs/rk3066_common.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2015 Google, Inc + */ + +#ifndef __CONFIG_RK3066_COMMON_H +#define __CONFIG_RK3066_COMMON_H + +#include <asm/arch-rockchip/hardware.h> +#include "rockchip-common.h" + +#define CONFIG_SYS_CBSIZE 256 + +#define CONFIG_SYS_INIT_SP_ADDR 0x78000000 + +#define CONFIG_IRAM_BASE 0x10080000 + +#define CONFIG_SPL_MAX_SIZE 0x32000 + +#define CONFIG_SPL_STACK 0x1008FFFF + +#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define SDRAM_BANK_SIZE (1024UL << 20UL) +#define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE + +#ifndef CONFIG_SPL_BUILD + +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x60000000\0" \ + "pxefile_addr_r=0x60100000\0" \ + "fdt_addr_r=0x61f00000\0" \ + "kernel_addr_r=0x62000000\0" \ + "ramdisk_addr_r=0x64000000\0" + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x6fffffff\0" \ + "initrd_high=0x6fffffff\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ + BOOTENV + +#endif /* CONFIG_SPL_BUILD */ + +#endif |