diff options
| author | Marek Vasut | 2019-07-29 19:59:44 +0200 |
|---|---|---|
| committer | Marek Vasut | 2019-08-09 23:15:01 +0200 |
| commit | 3ebb91914f4831df4db42675c4dd1f9a0b7548c7 (patch) | |
| tree | e9f4ecadbb24bc0b3485e636780ffe731a7f30c5 /include | |
| parent | 57ede1a3d430544ecde2f3e08fb8d19586d00cc1 (diff) | |
ARM: renesas: Add R8A77980 V3H Condor board code
Add board code for the R8A77980 V3H Condor board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/condor.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/include/configs/condor.h b/include/configs/condor.h new file mode 100644 index 00000000000..e3c146e8244 --- /dev/null +++ b/include/configs/condor.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * include/configs/condor.h + * This file is Condor board configuration. + * + * Copyright (C) 2019 Renesas Electronics Corporation + */ + +#ifndef __CONDOR_H +#define __CONDOR_H + +#include "rcar-gen3-common.h" + +/* Ethernet RAVB */ +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* Environment compatibility */ +#undef CONFIG_ENV_SIZE_REDUND +#undef CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_SECT_SIZE (256 * 1024) +#define CONFIG_ENV_OFFSET 0x700000 + +/* SH Ether */ +#define CONFIG_SH_ETHER_USE_PORT 0 +#define CONFIG_SH_ETHER_PHY_ADDR 0x1 +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII +#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* Board Clock */ +/* XTAL_CLK : 33.33MHz */ +#define CONFIG_SYS_CLK_FREQ 33333333u + +/* Generic Timer Definitions (use in assembler source) */ +#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ + +#endif /* __CONDOR_H */ |