diff options
| author | Tom Rini | 2022-03-30 18:07:23 -0400 |
|---|---|---|
| committer | Tom Rini | 2022-04-08 10:46:22 -0400 |
| commit | 55b3ba4c2ba4c464491604c5da63debae72aa5c6 (patch) | |
| tree | d9c1f95b2ba4e6b44b917431a764afcced7fe72b /include | |
| parent | 5d14c336b21da34d07e93b5689ccffd52b8cc658 (diff) | |
spi: cadence_qspi: Migrate CONFIG_CQSPI_REF_CLK to Kconfig
This is a little tricky since SoCFPGA has code to determine this as
runtime. Introduce a guard variable for platforms to select if they
have a static value to use. Then for ARCH_SOCFPGA, call
cm_get_qspi_controller_clk_hz() and otherwise continue the previous
behavior.
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/j721e_evm.h | 1 | ||||
| -rw-r--r-- | include/configs/j721s2_evm.h | 1 | ||||
| -rw-r--r-- | include/configs/k2g_evm.h | 4 | ||||
| -rw-r--r-- | include/configs/socfpga_common.h | 9 | ||||
| -rw-r--r-- | include/configs/socfpga_soc64_common.h | 5 | ||||
| -rw-r--r-- | include/configs/stv0991.h | 8 |
6 files changed, 0 insertions, 28 deletions
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 5aaa31eaa15..df3c16540ba 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -57,7 +57,6 @@ #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_CQSPI_REF_CLK 133333333 /* HyperFlash related configuration */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 87884649236..f0d56b8778e 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -58,7 +58,6 @@ #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_CQSPI_REF_CLK 133333333 /* U-Boot general configuration */ #define EXTRA_ENV_J721S2_BOARD_SETTINGS \ diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 294ce4662e2..887fda90d6a 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -59,10 +59,6 @@ #define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE #define PHY_ANEG_TIMEOUT 10000 /* PHY needs longer aneg time */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_CQSPI_REF_CLK 384000000 -#endif - #define SPI_MTD_PARTS KEYSTONE_SPI1_MTD_PARTS #include <configs/ti_armv7_keystone2.h> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index e094bef3b50..5ecd1e6399b 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -122,15 +122,6 @@ #endif /* - * QSPI support - */ -/* QSPI reference clock */ -#ifndef __ASSEMBLY__ -unsigned int cm_get_qspi_controller_clk_hz(void); -#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() -#endif - -/* * USB */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index b810567a03a..c288d548f5b 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -61,11 +61,6 @@ #define MTDIDS_DEFAULT "nor0=ff705000.spi.0" #endif /* CONFIG_SPL_BUILD */ -#ifndef __ASSEMBLY__ -unsigned int cm_get_qspi_controller_clk_hz(void); -#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() -#endif - #endif /* CONFIG_CADENCE_QSPI */ /* diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index feec8695f2e..137672909be 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -31,12 +31,4 @@ /* Misc configuration */ -/* -+ * QSPI support -+ */ -#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ -#define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 - -#endif - #endif /* __CONFIG_H */ |