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authorTom Rini2018-03-05 20:24:17 -0500
committerTom Rini2018-03-05 20:24:17 -0500
commit81f077f40f80eb431bfec88c9fe2a7da3efa8e5f (patch)
tree5910c7c388c33accdbddb9862250f165c83e9313 /include
parent3cbd5ff18d099bdb5256a67ea10ea187adb77f14 (diff)
parentb2c38dc3d3693578e8067ca2333ab3f6e6cc00d4 (diff)
Merge git://git.denx.de/u-boot-sh
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/power/r8a77965-sysc.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/include/dt-bindings/power/r8a77965-sysc.h b/include/dt-bindings/power/r8a77965-sysc.h
new file mode 100644
index 00000000000..05a4b591731
--- /dev/null
+++ b/include/dt-bindings/power/r8a77965-sysc.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
+ * Copyright (C) 2016 Glider bvba
+ */
+
+#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77965_PD_CA57_CPU0 0
+#define R8A77965_PD_CA57_CPU1 1
+#define R8A77965_PD_A3VP 9
+#define R8A77965_PD_CA57_SCU 12
+#define R8A77965_PD_CR7 13
+#define R8A77965_PD_A3VC 14
+#define R8A77965_PD_3DG_A 17
+#define R8A77965_PD_3DG_B 18
+#define R8A77965_PD_A3IR 24
+#define R8A77965_PD_A2VC1 26
+
+/* Always-on power area */
+#define R8A77965_PD_ALWAYS_ON 32
+
+#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */