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authorTom Rini2018-05-30 08:43:04 -0400
committerTom Rini2018-05-30 08:43:04 -0400
commit964d4f7211ec85b890e852d0226adba0b4f8c1c9 (patch)
tree7b682f156a9bde3b9c3d82a184091bd4445f15cd /include
parent9c2369a554437f072733c53ba0f5f5384f35b6d3 (diff)
parent6ffea11b89099d72029bc644f7664736ee7ca667 (diff)
Merge git://git.denx.de/u-boot-riscv
Diffstat (limited to 'include')
-rw-r--r--include/config_distro_bootcmd.h11
-rw-r--r--include/configs/ax25-ae350.h (renamed from include/configs/nx25-ae250.h)55
-rw-r--r--include/efi_loader.h7
3 files changed, 73 insertions, 0 deletions
diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h
index 8d5feb3ac77..d672e8ebe65 100644
--- a/include/config_distro_bootcmd.h
+++ b/include/config_distro_bootcmd.h
@@ -99,6 +99,10 @@
#define BOOTEFI_NAME "bootia32.efi"
#elif defined(CONFIG_X86_RUN_64BIT)
#define BOOTEFI_NAME "bootx64.efi"
+#elif defined(CONFIG_CPU_RISCV_32)
+#define BOOTEFI_NAME "bootriscv32.efi"
+#elif defined(CONFIG_CPU_RISCV_64)
+#define BOOTEFI_NAME "bootriscv64.efi"
#endif
#endif
@@ -240,6 +244,7 @@
#if defined(CONFIG_CMD_DHCP)
#if defined(CONFIG_EFI_LOADER)
+/* http://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml */
#if defined(CONFIG_ARM64)
#define BOOTENV_EFI_PXE_ARCH "0xb"
#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00011:UNDI:003000"
@@ -250,6 +255,12 @@
/* Always assume we're running 64bit */
#define BOOTENV_EFI_PXE_ARCH "0x7"
#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00007:UNDI:003000"
+#elif defined(CONFIG_CPU_RISCV_32)
+#define BOOTENV_EFI_PXE_ARCH "0x19"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00025:UNDI:003000"
+#elif defined(CONFIG_CPU_RISCV_64)
+#define BOOTENV_EFI_PXE_ARCH "0x1b"
+#define BOOTENV_EFI_PXE_VCI "PXEClient:Arch:00027:UNDI:003000"
#else
#error Please specify an EFI client identifier
#endif
diff --git a/include/configs/nx25-ae250.h b/include/configs/ax25-ae350.h
index 930cdbd4e40..b1ca5ac11a9 100644
--- a/include/configs/nx25-ae250.h
+++ b/include/configs/ax25-ae350.h
@@ -79,6 +79,44 @@
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0
#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
+/*
+ * FLASH and environment organization
+ */
+
+/* use CFI framework */
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_FLASH_CFI_DRIVER
+
+#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
+#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
+
+/* support JEDEC */
+#ifdef CONFIG_CFI_FLASH
+#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
+#endif/* Do not use CONFIG_FLASH_CFI_LEGACY to detect on board flash */
+#define PHYS_FLASH_1 0x88000000 /* BANK 0 */
+#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, }
+#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
+
+#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */
+
+/* max number of memory banks */
+/*
+ * There are 4 banks supported for this Controller,
+ * but we have only 1 bank connected to flash on board
+*/
+#ifndef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#endif
+#define CONFIG_SYS_FLASH_BANKS_SIZES {0x4000000}
+
+/* max number of sectors on one chip */
+#define CONFIG_FLASH_SECTOR_SIZE (0x10000*2)
+#define CONFIG_SYS_MAX_FLASH_SECT 512
+
/* environments */
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
@@ -104,4 +142,21 @@
/* Increase max gunzip size */
#define CONFIG_SYS_BOOTM_LEN (64 << 20)
+/* When we use RAM as ENV */
+#define CONFIG_ENV_SIZE 0x2000
+
+/* Enable distro boot */
+#define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 0) \
+ func(DHCP, dhcp, na)
+#include <config_distro_bootcmd.h>
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "kernel_addr_r=0x00080000\0" \
+ "pxefile_addr_r=0x01f00000\0" \
+ "scriptaddr=0x01f00000\0" \
+ "fdt_addr_r=0x02000000\0" \
+ "ramdisk_addr_r=0x02800000\0" \
+ BOOTENV
+
#endif /* __CONFIG_H */
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 2868ca25abb..ec000658f6d 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -75,6 +75,13 @@ const char *__efi_nesting_dec(void);
##__VA_ARGS__); \
})
+#ifdef CONFIG_SYS_CACHELINE_SIZE
+#define EFI_CACHELINE_SIZE CONFIG_SYS_CACHELINE_SIZE
+#else
+/* Just use the greatest cache flush alignment requirement I'm aware of */
+#define EFI_CACHELINE_SIZE 128
+#endif
+
extern struct efi_runtime_services efi_runtime_services;
extern struct efi_system_table systab;