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authorMarek Vasut2019-05-07 21:59:57 +0200
committerMarek Vasut2019-05-10 22:43:18 +0200
commita786d9be88200b9d03e9f7daf700621ad14d8b8a (patch)
tree4f2305b64c2bf31c829e8350d8afb6c64cf82cfe /include
parent7de3ea8b98a531c516505f07902e56077bf78816 (diff)
sh: mpr2: Remove the board
Last change to this board was done in 2016, has no prospects of ever being converted to DM, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Mark Jonas <mark.jonas@de.bosch.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/mpr2.h55
1 files changed, 0 insertions, 55 deletions
diff --git a/include/configs/mpr2.h b/include/configs/mpr2.h
deleted file mode 100644
index e8594966e0b..00000000000
--- a/include/configs/mpr2.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuation settings for MPR2
- *
- * Copyright (C) 2008
- * Mark Jonas <mark.jonas@de.bosch.com>
- */
-
-#ifndef __MPR2_H
-#define __MPR2_H
-
-/* Supported commands */
-
-/* Default environment variables */
-#define CONFIG_BOOTFILE "/boot/zImage"
-#define CONFIG_LOADADDR 0x8E000000
-
-/* CPU and platform */
-#define CONFIG_CPU_SH7720 1
-
-#define CONFIG_DISPLAY_BOARDINFO
-
-/* U-Boot internals */
-#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
-#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_MONITOR_LEN (128 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
-
-/* Memory */
-#define CONFIG_SYS_SDRAM_BASE 0x8C000000
-#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024)
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-
-/* Flash */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-#define CONFIG_SYS_FLASH_BASE 0xA0000000
-#define CONFIG_SYS_MAX_FLASH_SECT 256
-#define CONFIG_SYS_MAX_FLASH_BANKS 1
-#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
-#define CONFIG_ENV_SECT_SIZE (128 * 1024)
-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500
-
-/* Clocks */
-#define CONFIG_SYS_CLK_FREQ 24000000
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-/* UART */
-#define CONFIG_CONS_SCIF0 1
-
-#endif /* __MPR2_H */