diff options
| author | Tom Rini | 2022-11-16 13:10:37 -0500 |
|---|---|---|
| committer | Tom Rini | 2022-12-05 16:06:07 -0500 |
| commit | aa6e94deabb45154cea07ad44c4a5c047bca078b (patch) | |
| tree | 1131ae8e3635f3d0c91f8df892ab05e4d9595785 /include | |
| parent | aec118ebe63f7f0ab60916f9906fb3cb680abf7a (diff) | |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
359 files changed, 616 insertions, 616 deletions
diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 719caf7b0c3..3a4fbc6eab8 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -30,8 +30,8 @@ * -The heap is placed below the monitor * -The stack is placed below the heap (&grows down). */ -#define CONFIG_SYS_SDRAM_BASE 0xc8000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0xc8000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index ad7bd133200..ab889180eed 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -26,8 +26,8 @@ * -The heap is placed below the monitor * -The stack is placed below the heap (&grows down). */ -#define CONFIG_SYS_SDRAM_BASE 0xD0000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0xD0000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM #endif /* __CONFIG_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index 25c3f22bea1..6dfa3dd0f02 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -60,22 +60,22 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x43711630 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1002000 -#define CONFIG_SYS_SDRAM_EMOD 0x80010000 -#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x43711630 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1002000 +#define CFG_SYS_SDRAM_EMOD 0x80010000 +#define CFG_SYS_SDRAM_MODE 0x00CD0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ #ifdef CONFIG_SYS_FLASH_CFI @@ -100,8 +100,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index f200d706a92..e28662c6e59 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -70,10 +70,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* * For booting Linux, the board info and command line data @@ -81,7 +81,7 @@ * the maximum mapped by the Linux kernel during initialization ?? */ /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -109,8 +109,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DCM | \ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 9ff66d751c6..f1da278d515 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -52,10 +52,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) #if 0 /* test-only */ @@ -67,7 +67,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -90,8 +90,8 @@ #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ CF_ADDRMASK(2) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ CF_CACR_DBWE) diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index f7bfe598a80..bd3c57d1438 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -77,17 +77,17 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE) @@ -117,8 +117,8 @@ #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \ CF_ADDRMASK(8) | \ CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR1 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \ CF_CACR_DBWE) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index dcd83650f22..7c3bc032bfe 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -71,10 +71,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 /* @@ -82,7 +82,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /* * FLASH organization @@ -100,8 +100,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 9012794501a..4eb4abea725 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -73,10 +73,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE /* @@ -84,7 +84,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -101,8 +101,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 925d26eaf10..eda394467e9 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -72,10 +72,10 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 @@ -85,7 +85,7 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -105,8 +105,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DBWE | \ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 79a4e6171d2..159993a46bc 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -74,22 +74,22 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x43711630 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 -#define CONFIG_SYS_SDRAM_EMOD 0x80010000 -#define CONFIG_SYS_SDRAM_MODE 0x00CD0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 64 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x43711630 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1092000 +#define CFG_SYS_SDRAM_EMOD 0x80010000 +#define CFG_SYS_SDRAM_MODE 0x00CD0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -118,8 +118,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index fc21af56ec7..d7ece639349 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -68,22 +68,22 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x53722730 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 -#define CONFIG_SYS_SDRAM_EMOD 0x40010000 -#define CONFIG_SYS_SDRAM_MODE 0x018D0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x53722730 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1092000 +#define CFG_SYS_SDRAM_EMOD 0x40010000 +#define CFG_SYS_SDRAM_MODE 0x018D0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -117,8 +117,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index f7c09a2333c..b2fc6923e0d 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -70,22 +70,22 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x53722730 -#define CONFIG_SYS_SDRAM_CFG2 0x56670000 -#define CONFIG_SYS_SDRAM_CTRL 0xE1092000 -#define CONFIG_SYS_SDRAM_EMOD 0x40010000 -#define CONFIG_SYS_SDRAM_MODE 0x018D0000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_CFG1 0x53722730 +#define CFG_SYS_SDRAM_CFG2 0x56670000 +#define CFG_SYS_SDRAM_CTRL 0xE1092000 +#define CFG_SYS_SDRAM_EMOD 0x40010000 +#define CFG_SYS_SDRAM_MODE 0x018D0000 /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20)) /*----------------------------------------------------------------------- * FLASH organization @@ -117,8 +117,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index a5518d3d50f..2e7140cd86a 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -62,8 +62,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR (CONFIG_SYS_IMMR + 0x2800) #define CONFIG_SYS_INIT_RAM_SIZE (0x2e00 - 0x2800) -/* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +/* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */ +#define CFG_SYS_SDRAM_BASE 0x00000000 /* FLASH organization */ #define CONFIG_SYS_FLASH_BASE CONFIG_TEXT_BASE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 0e70b2853b2..d9627e393d9 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -59,7 +59,7 @@ /* * DDR Setup */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ +#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL 0x03000000 #define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN) @@ -69,7 +69,7 @@ /* * Manually set up DDR parameters */ -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ #define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ | CSCONFIG_ODT_WR_ONLY_CURRENT \ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index c59a37646f4..6a51149a949 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -40,7 +40,7 @@ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f87e7597ad0..21491b9f97c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -110,9 +110,9 @@ #ifndef __ASSEMBLY__ extern unsigned long get_sdram_size(void); #endif -#define CONFIG_SYS_SDRAM_SIZE get_sdram_size() /* DDR size */ +#define CFG_SYS_SDRAM_SIZE get_sdram_size() /* DDR size */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8c7b877bfb9..d7e06d23ec4 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -69,10 +69,10 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x52 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /* * Local Bus Definitions diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index 824190a4123..417b9ae7b24 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -7,7 +7,7 @@ #define _CONFIG_SBX81LIFKW_H /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* * NS16550 Configuration diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index e67da1fe1dc..87b68227a0d 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -7,7 +7,7 @@ #define _CONFIG_SBX81LIFXCAT_H /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* * NS16550 Configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 154b2f174af..616387f4876 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -116,12 +116,12 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) -#define CONFIG_SYS_SDRAM_SIZE 2048 +#define CFG_SYS_SDRAM_SIZE 2048 #endif /* diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 847cf65b409..37dfe32e21b 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -88,11 +88,11 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /* * IFC Definitions diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index b49c2647768..8f56de40ce8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -86,8 +86,8 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index aae41a33925..e9db4a224f9 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -81,8 +81,8 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 9dc45e397f9..cc86c9d4a51 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -62,7 +62,7 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* * IFC Definitions @@ -154,7 +154,7 @@ #define SPD_EEPROM_ADDRESS2 0x54 #define SPD_EEPROM_ADDRESS3 0x56 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /* * IFC Definitions diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h index 78201adc07f..57f3f37908d 100644 --- a/include/configs/am62x_evm.h +++ b/include/configs/am62x_evm.h @@ -13,7 +13,7 @@ #include <environment/ti/mmc.h> /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/am64x_evm.h b/include/configs/am64x_evm.h index 140940730d0..25c71f00a20 100644 --- a/include/configs/am64x_evm.h +++ b/include/configs/am64x_evm.h @@ -16,7 +16,7 @@ #include <environment/ti/k3_dfu.h> /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 0345160787e..0307426e4ab 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -15,7 +15,7 @@ #include <environment/ti/k3_dfu.h> /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 2bda66fe033..eba78d3894c 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -33,8 +33,8 @@ /* size of internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 0x1000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 0x1000000 #define CONFIG_SYS_FLASH_BASE 0xffc00000 /* amcore design has flash data bytes wired swapped */ diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 650140bb724..63c7dfc1feb 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 3114cf0c4fb..865aad2a3f9 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 diff --git a/include/configs/ap152.h b/include/configs/ap152.h index f0674456fd0..0464a69e823 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index e2e491bdb0a..cf23837863b 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -63,7 +63,7 @@ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 30d32d27e3d..356d4c35ee2 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -106,7 +106,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/arbel.h b/include/configs/arbel.h index f7deba4f566..ed32e772f8e 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -6,9 +6,9 @@ #ifndef __CONFIG_ARBEL_H #define __CONFIG_ARBEL_H -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_BASE 0x0 #define CONFIG_SYS_BOOTMAPSZ (20 << 20) -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Default environemnt variables */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 35e8840a92a..90cf4705f4f 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -406,7 +406,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 5c9005805e1..cbd0d6cea01 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -14,7 +14,7 @@ /* Misc CPU related */ -#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE +#define CFG_SYS_SDRAM_BASE ASPEED_DRAM_BASE #ifdef CONFIG_PRE_CON_BUF_SZ #define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 58635df149b..b142ea3c335 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -57,7 +57,7 @@ #define CONFIG_SYS_CLK 80000000 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) -#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ /* * Define baudrate for UART1 (console output, tftp, ...) @@ -158,7 +158,7 @@ * (Set up by the startup code) * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* * Chipselect bank definitions @@ -195,8 +195,8 @@ * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization ?? */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ - (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ + (CFG_SYS_SDRAM_SIZE << 20)) /* FLASH organization */ @@ -213,8 +213,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ CF_CACR_DCM_P) diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 574bfe37e9a..0d76f419db5 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -31,8 +31,8 @@ * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #ifdef CONFIG_AT91SAM9XE diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 2c785ad4264..dcc1cca4791 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -17,8 +17,8 @@ #include <asm/hardware.h> /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index bba8574b1c8..aefa9fc60c4 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -23,8 +23,8 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 @@ -100,22 +100,22 @@ /* Memory Device Register -> SDRAM */ #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE -#define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH -#define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR -#define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL -#define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ -#define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 3ce264a4a90..08cfee1a4e1 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -15,8 +15,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x70000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0x70000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 5e3ded241fa..76f87c16192 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -14,8 +14,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ /* Misc CPU related */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* DataFlash */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index b79c8ba5bf8..e1111b6dd38 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -17,8 +17,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 40ea4ed49e8..eb1d1ad60d1 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -20,8 +20,8 @@ */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ /* DataFlash */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index e3b6956eb5a..83ac87b10a5 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -28,7 +28,7 @@ (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ #define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_0 /* * Serial console configuration diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index 1932713f453..6d82712186d 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -20,8 +20,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_512M +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_512M /* * UART configuration diff --git a/include/configs/bcm947622.h b/include/configs/bcm947622.h index d0c46a2c823..b02ed1bfe0e 100644 --- a/include/configs/bcm947622.h +++ b/include/configs/bcm947622.h @@ -6,7 +6,7 @@ #ifndef __BCM947622_H #define __BCM947622_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define COUNTER_FREQUENCY 50000000 #endif diff --git a/include/configs/bcm94908.h b/include/configs/bcm94908.h index 1346ace4bf6..246feb66b29 100644 --- a/include/configs/bcm94908.h +++ b/include/configs/bcm94908.h @@ -6,6 +6,6 @@ #ifndef __BCM94908_H #define __BCM94908_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm94912.h b/include/configs/bcm94912.h index f3d17ddaacf..c428b1ab578 100644 --- a/include/configs/bcm94912.h +++ b/include/configs/bcm94912.h @@ -6,6 +6,6 @@ #ifndef __BCM94912_H #define __BCM94912_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963138.h b/include/configs/bcm963138.h index 361569a8c5f..f1b68ba6733 100644 --- a/include/configs/bcm963138.h +++ b/include/configs/bcm963138.h @@ -6,7 +6,7 @@ #ifndef __BCM963138_H #define __BCM963138_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_HZ_CLOCK 500000000 #endif diff --git a/include/configs/bcm963146.h b/include/configs/bcm963146.h index edbdfc3c51a..90dfa98311d 100644 --- a/include/configs/bcm963146.h +++ b/include/configs/bcm963146.h @@ -6,6 +6,6 @@ #ifndef __BCM963146_H #define __BCM963146_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963148.h b/include/configs/bcm963148.h index 5a24cccba10..54f6750c743 100644 --- a/include/configs/bcm963148.h +++ b/include/configs/bcm963148.h @@ -6,6 +6,6 @@ #ifndef __BCM963148_H #define __BCM963148_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963158.h b/include/configs/bcm963158.h index b15c4111c96..2fdd22d1b0d 100644 --- a/include/configs/bcm963158.h +++ b/include/configs/bcm963158.h @@ -6,6 +6,6 @@ #ifndef __BCM963158_H #define __BCM963158_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm963178.h b/include/configs/bcm963178.h index b25f6a12819..32fc4a5e390 100644 --- a/include/configs/bcm963178.h +++ b/include/configs/bcm963178.h @@ -6,6 +6,6 @@ #ifndef __BCM963178_H #define __BCM963178_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96756.h b/include/configs/bcm96756.h index c8f32672b7d..c69d177da2e 100644 --- a/include/configs/bcm96756.h +++ b/include/configs/bcm96756.h @@ -6,6 +6,6 @@ #ifndef __BCM96756_H #define __BCM96756_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96813.h b/include/configs/bcm96813.h index 5d9e87b693a..37d2d91d96f 100644 --- a/include/configs/bcm96813.h +++ b/include/configs/bcm96813.h @@ -6,6 +6,6 @@ #ifndef __BCM96813_H #define __BCM96813_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96846.h b/include/configs/bcm96846.h index 1d6d5d61669..581fd559856 100644 --- a/include/configs/bcm96846.h +++ b/include/configs/bcm96846.h @@ -6,6 +6,6 @@ #ifndef __BCM96846_H #define __BCM96846_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96855.h b/include/configs/bcm96855.h index 6e420f2c66f..3fb1ab9230c 100644 --- a/include/configs/bcm96855.h +++ b/include/configs/bcm96855.h @@ -6,6 +6,6 @@ #ifndef __BCM96855_H #define __BCM96855_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96856.h b/include/configs/bcm96856.h index a7ae71eeaaf..5f5af321897 100644 --- a/include/configs/bcm96856.h +++ b/include/configs/bcm96856.h @@ -6,6 +6,6 @@ #ifndef __BCM96856_H #define __BCM96856_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96858.h b/include/configs/bcm96858.h index 4e584b41fb3..9a0d89a7519 100644 --- a/include/configs/bcm96858.h +++ b/include/configs/bcm96858.h @@ -6,6 +6,6 @@ #ifndef __BCM96858_H #define __BCM96858_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm96878.h b/include/configs/bcm96878.h index 3e23e94ac4b..7702d1f5682 100644 --- a/include/configs/bcm96878.h +++ b/include/configs/bcm96878.h @@ -6,6 +6,6 @@ #ifndef __BCM96878_H #define __BCM96878_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #endif diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h index 76189a4d31f..b5469880fe2 100644 --- a/include/configs/bcm_ns3.h +++ b/include/configs/bcm_ns3.h @@ -15,7 +15,7 @@ #define V2M_BASE 0x80000000 #define PHYS_SDRAM_1 V2M_BASE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * Initial SP before reloaction is placed at end of first DRAM bank, diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h index 9f51b9ca59d..9769a714092 100644 --- a/include/configs/bcmstb.h +++ b/include/configs/bcmstb.h @@ -81,7 +81,7 @@ extern phys_addr_t prior_stage_fdt_address; * MiB. However, BOLT can be configured to allow loading larger * initramfs images, in which case this limitation is eliminated. */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 /* diff --git a/include/configs/bitmain_antminer_s9.h b/include/configs/bitmain_antminer_s9.h index 829e816ad66..556bfa08ebb 100644 --- a/include/configs/bitmain_antminer_s9.h +++ b/include/configs/bitmain_antminer_s9.h @@ -6,8 +6,8 @@ #ifndef __CONFIG_BITMAIN_ANTMINER_S9_H #define __CONFIG_BITMAIN_ANTMINER_S9_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_EXTRA_ENV_SETTINGS \ "pxefile_addr_r=0x2000000\0" \ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index ca2bc1907e3..a075a5b2f32 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -199,7 +199,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (SZ_512M) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/bmips_bcm3380.h b/include/configs/bmips_bcm3380.h index c328f414201..e40f110cac6 100644 --- a/include/configs/bmips_bcm3380.h +++ b/include/configs/bmips_bcm3380.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6318.h b/include/configs/bmips_bcm6318.h index d16d50e5ec2..508317f231e 100644 --- a/include/configs/bmips_bcm6318.h +++ b/include/configs/bmips_bcm6318.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm63268.h b/include/configs/bmips_bcm63268.h index f69c46b11c4..c5bda16d2bc 100644 --- a/include/configs/bmips_bcm63268.h +++ b/include/configs/bmips_bcm63268.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6328.h b/include/configs/bmips_bcm6328.h index acd021ecadc..32397c26e8a 100644 --- a/include/configs/bmips_bcm6328.h +++ b/include/configs/bmips_bcm6328.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h index fa9e5f02a08..18c99727a04 100644 --- a/include/configs/bmips_bcm6338.h +++ b/include/configs/bmips_bcm6338.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h index bcf5c874d32..f8d7148d497 100644 --- a/include/configs/bmips_bcm6348.h +++ b/include/configs/bmips_bcm6348.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h index e31b8bc719e..d564a32ee52 100644 --- a/include/configs/bmips_bcm6358.h +++ b/include/configs/bmips_bcm6358.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h index 6e707d341b7..f982a4363db 100644 --- a/include/configs/bmips_bcm6362.h +++ b/include/configs/bmips_bcm6362.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h index bb72c8cb533..11d623c28b2 100644 --- a/include/configs/bmips_bcm6368.h +++ b/include/configs/bmips_bcm6368.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/bmips_bcm6838.h b/include/configs/bmips_bcm6838.h index a1c992b7a6e..30965c85bfa 100644 --- a/include/configs/bmips_bcm6838.h +++ b/include/configs/bmips_bcm6838.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* U-Boot */ diff --git a/include/configs/boston.h b/include/configs/boston.h index a09e831c540..0033a7fb022 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -22,9 +22,9 @@ * Memory map */ #ifdef CONFIG_64BIT -# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +# define CFG_SYS_SDRAM_BASE 0xffffffff80000000 #else -# define CONFIG_SYS_SDRAM_BASE 0x80000000 +# define CFG_SYS_SDRAM_BASE 0x80000000 #endif #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index bdedf7ea2d7..78b2000aa2e 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -76,7 +76,7 @@ BUR_COMMON_ENV \ /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 1bf6baf75c2..f1734aaca7f 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -45,7 +45,7 @@ * always, even when we have more. We always start at 0x80000000, * and we place the initial stack pointer in our SRAM. */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* * Our platforms make use of SPL to initalize the hardware (primarily diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index c4110f84c0b..474ad69d996 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -92,7 +92,7 @@ /* On CCP board, USDHC1 is for eMMC */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 /* DDR3 board total DDR is 1 GB */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index c395384c8d3..6f2b8245b98 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -111,7 +111,7 @@ #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index b7511adc09a..f268dfd0943 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -11,7 +11,7 @@ /* Memory configuration */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ +#define CFG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 /* NS16550-ish UARTs */ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index fc45e597f6d..eb899c45578 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -82,7 +82,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 25443629e20..47c4aacc436 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -21,7 +21,7 @@ /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 52000b58b73..65b9074cd9c 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -30,7 +30,7 @@ */ #define CONFIG_SYS_CLK 66000000 -#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ /* --- * Define baudrate for UART1 (console output, tftp, ...) @@ -152,9 +152,9 @@ enter a valid image address in flash */ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* *------------------------------------------------------------------------- @@ -162,7 +162,7 @@ enter a valid image address in flash */ *----------------------------------------------------------------------- */ -/* #define CONFIG_SYS_SDRAM_SIZE 16 */ +/* #define CFG_SYS_SDRAM_SIZE 16 */ /* *----------------------------------------------------------------------- @@ -186,8 +186,8 @@ enter a valid image address in flash */ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ CF_CACR_DISD | CF_CACR_INVI | \ diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index afe8badd650..ca8445a3d05 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -116,7 +116,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index d641fbf47e7..6002d8d5c9f 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -96,7 +96,7 @@ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ #define CFG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 68d923c1ae1..14278e9ca4f 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -100,7 +100,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index f9bf849ae98..c08095561d8 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -160,7 +160,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 0f6f99d244f..11283071397 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -85,7 +85,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (256 * SZ_1M) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 8e0230c135e..8aec52d508e 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -22,7 +22,7 @@ #define PHYS_SDRAM_1 (V2M_BASE) #define PHYS_SDRAM_1_SIZE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 9d44e6723e2..c7a3e47437b 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -32,8 +32,8 @@ #define CONFIG_USART_ID ATMEL_ID_SYS /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 4f0188dd19e..e2e1cfedbde 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -166,7 +166,7 @@ /* Load U-Boot Image From MMC */ /* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CFG_SYS_SDRAM_BASE 0xc0000000 #include <asm/arch/hardware.h> diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index b944d50663c..b16f3d48e38 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -42,7 +42,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_512M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 5244b9cf5cc..c473f3d86eb 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -15,8 +15,8 @@ /* * Memory configurations */ -#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_64M +#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CFG_SYS_SDRAM_SIZE SZ_64M /* * DMA diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index e694dd7551a..ddc436d5019 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -72,7 +72,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/display5.h b/include/configs/display5.h index 0e5ecab9feb..0a7428b02ca 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -283,7 +283,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index c37b4c635b2..daf7ecd7975 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -17,7 +17,7 @@ #define PHYS_SDRAM_1 0x80000000 /* Note: 8 MiB (0x86000000 - 0x86800000) are reserved for tz/smem/hyp/rmtfs/rfsa */ #define PHYS_SDRAM_1_SIZE SZ_1G -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Environment */ #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index 1fa5d05e7b4..31cd8536de4 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -19,7 +19,7 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0x5ea4ffff -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #include <config_distro_bootcmd.h> diff --git a/include/configs/durian.h b/include/configs/durian.h index 8f0e8be4330..001596c00a4 100644 --- a/include/configs/durian.h +++ b/include/configs/durian.h @@ -11,7 +11,7 @@ /* Sdram Bank #1 Address */ #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_1_SIZE 0x7B000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* BOOT */ diff --git a/include/configs/ea-lpc3250devkitv2.h b/include/configs/ea-lpc3250devkitv2.h index 1d655292d7e..fc1c2aed778 100644 --- a/include/configs/ea-lpc3250devkitv2.h +++ b/include/configs/ea-lpc3250devkitv2.h @@ -13,7 +13,7 @@ /* * RAM */ -#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE /* * cmd diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 80a820c913b..80de73d15d5 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -66,13 +66,13 @@ /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE0 0x00000000 -#define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE0 0x00000000 +#define CFG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 -#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 +#define CFG_SYS_SDRAM_BASE CFG_SYS_SDRAM_BASE0 +#define CFG_SYS_SDRAM_SIZE CFG_SYS_SDRAM_SIZE0 /* * For booting Linux, the board info and command line data @@ -103,8 +103,8 @@ #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) -#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ CF_CACR_CEIB | CF_CACR_DBWE | \ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 16d2648e11f..d24bc56f34a 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -50,7 +50,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index a4891ddbc4f..e39bb94314f 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -27,7 +27,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 60fab0419f5..c2b921e7cb8 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -8,8 +8,8 @@ #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0x10000000 -#define CONFIG_SYS_SDRAM_SIZE SZ_16M +#define CFG_SYS_SDRAM_BASE 0x10000000 +#define CFG_SYS_SDRAM_SIZE SZ_16M /* * Environment diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 2f067a44248..b4f14a9a589 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,7 +10,7 @@ #include <configs/exynos7420-common.h> -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index f19e12d9090..97a8ffb4f61 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -26,8 +26,8 @@ #define CONFIG_SYS_INIT_RAM_SIZE (32 << 10) /* 128MB SDRAM in 1 bank */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE (128 << 20) +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE (128 << 20) /* 512kB on-chip NOR flash */ # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 44f5cb1e83f..dd322c2b3a7 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -29,21 +29,21 @@ #define CONFIG_RD_LVL -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE /* SPI */ diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index 8e2f135f934..cc0cf5ecbfb 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -9,7 +9,7 @@ #ifndef __CONFIG_5250_H #define __CONFIG_5250_H -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index a8bef860c2f..cff910c1bd5 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -23,21 +23,21 @@ /* select serial console configuration */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE /* Configuration of ENV Blocks */ diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index b05846d0b92..68c36dc2fd9 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -21,32 +21,32 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_5 (CFG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_6 (CFG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_7 (CFG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_8 (CFG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_9 (CONFIG_SYS_SDRAM_BASE + (8 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_9 (CFG_SYS_SDRAM_BASE + (8 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_9_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_10 (CONFIG_SYS_SDRAM_BASE + (9 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_10 (CFG_SYS_SDRAM_BASE + (9 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_10_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_11 (CONFIG_SYS_SDRAM_BASE + (10 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_11 (CFG_SYS_SDRAM_BASE + (10 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_11_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_12 (CONFIG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_12 (CFG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_12_SIZE SDRAM_BANK_SIZE #ifndef MEM_LAYOUT_ENV_SETTINGS diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index ba098316e08..f5353ec79a1 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -18,8 +18,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ /* NAND flash */ #define CFG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index a1400eba1ad..a7557144402 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -7,7 +7,7 @@ #define __CONFIG_GARDENA_SMART_GATEWAY_H /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index fa6f0e63ac5..6cdfe8c4c3c 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -12,9 +12,9 @@ /* * DDR Setup */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ -/* TODO: Check: Can this be unified with CONFIG_SYS_SDRAM_BASE? */ -#define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ +/* TODO: Check: Can this be unified with CFG_SYS_SDRAM_BASE? */ +#define CONFIG_SYS_DDR_SDRAM_BASE CFG_SYS_SDRAM_BASE /* * Memory test diff --git a/include/configs/ge_b1x5v2.h b/include/configs/ge_b1x5v2.h index c862f15ee2b..85ceaf8ccb1 100644 --- a/include/configs/ge_b1x5v2.h +++ b/include/configs/ge_b1x5v2.h @@ -37,7 +37,7 @@ /* Memory */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index d519384d026..1dba2e92fb9 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -94,7 +94,7 @@ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index d2138c220f0..dd6b22de7ba 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -13,8 +13,8 @@ /* Miscellaneous */ /* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024) +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE (10 * 1024 * 1024) /* Network interface */ #define CONFIG_SH_ETHER_USE_PORT 0 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 645ca162a35..fe00272a1bd 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -53,7 +53,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/gxp.h b/include/configs/gxp.h index e3c97b20d51..2b0b04891cc 100644 --- a/include/configs/gxp.h +++ b/include/configs/gxp.h @@ -10,6 +10,6 @@ #ifndef _GXP_H_ #define _GXP_H_ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #endif diff --git a/include/configs/highbank.h b/include/configs/highbank.h index a7d21a76dba..0d281a3379a 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -14,7 +14,7 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x20000000\0" \ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 18c1e83aeb4..775f166f1d3 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -24,7 +24,7 @@ /* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/ #define PHYS_SDRAM_1_SIZE 0x3EFFFFFF -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 diff --git a/include/configs/hikey960.h b/include/configs/hikey960.h index 973df8e4abc..914c3ad9ef0 100644 --- a/include/configs/hikey960.h +++ b/include/configs/hikey960.h @@ -16,7 +16,7 @@ #define PHYS_SDRAM_1 0x00000000 #define PHYS_SDRAM_1_SIZE 0xC0000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 1d7b171da75..fcb2dec54ec 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -22,8 +22,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_1G +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_1G /* * UART configuration diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index 9e092e16ea0..0ae935208ca 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -21,8 +21,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_1G +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_1G /* * UART configuration diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index 1fc45f9060b..f1ca28b7ca3 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -21,8 +21,8 @@ */ /* SDRAM Configuration (for final code, data, stack, heap) */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ /*---------------------------------------------------------------------- * Commands diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 974dff8f6f4..594aa4f75e7 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -130,5 +130,5 @@ "upd=run load update\0" \ /* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #endif /* __IMX27LITE_COMMON_CONFIG_H */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index b8eb5c82cf7..d4e2583ee8a 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -109,7 +109,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 6b822e72505..1b08c5e9a7e 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -105,7 +105,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index f7f8f33ed89..a074df5829b 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -55,7 +55,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 15171d7ad67..855af29ec96 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -85,7 +85,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx6ulz_smm_m2.h b/include/configs/imx6ulz_smm_m2.h index 70b4b84215d..0a688afe6cd 100644 --- a/include/configs/imx6ulz_smm_m2.h +++ b/include/configs/imx6ulz_smm_m2.h @@ -63,7 +63,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index c6db5e943ee..e5118f11580 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -69,7 +69,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 917d567d2ec..e62f9c5462b 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -127,7 +127,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 8e088994580..143da001104 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -74,7 +74,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index dd9f93f35c2..c7669305f59 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -21,7 +21,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* Minimum 1 GiB DDR */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index f1d1c1c9c3d..9937071874f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -57,7 +57,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 9cdba70493b..cd47d842ffc 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -41,7 +41,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 065356341fc..58e165c35a7 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -32,7 +32,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index 0ae3da12ad3..f532c1052f5 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -78,7 +78,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR) #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mn_bsh_smm_s2_common.h b/include/configs/imx8mn_bsh_smm_s2_common.h index d6959ac95a1..415248eadfc 100644 --- a/include/configs/imx8mn_bsh_smm_s2_common.h +++ b/include/configs/imx8mn_bsh_smm_s2_common.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #endif /* __IMX8MN_BSH_SMM_S2_COMMON_H */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index 9c75e3eec15..8857bc7c598 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -49,7 +49,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index a484d913649..628bb5813ff 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -46,7 +46,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index d5252abb218..a169be35a49 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index bf878251364..62bcef5eecd 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -14,7 +14,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x20000000 /* Minimum 512 MiB DDR */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index 1b533e2c142..d394762e3bb 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -55,7 +55,7 @@ /* Totally 2GB DDR */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 diff --git a/include/configs/imx8mp_icore_mx8mp.h b/include/configs/imx8mp_icore_mx8mp.h index 7986d20eed1..3e995c97217 100644 --- a/include/configs/imx8mp_icore_mx8mp.h +++ b/include/configs/imx8mp_icore_mx8mp.h @@ -56,7 +56,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 /* Totally 2GB DDR */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 8f2b474817d..1943a24b79d 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -136,7 +136,7 @@ /* Totally 6GB or 4G DDR */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G) #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ diff --git a/include/configs/imx8mp_venice.h b/include/configs/imx8mp_venice.h index b1c213cc89b..7d360583c41 100644 --- a/include/configs/imx8mp_venice.h +++ b/include/configs/imx8mp_venice.h @@ -26,7 +26,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 4b2107e4057..271376cb9fc 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -50,7 +50,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 2d4c8d78c67..672a9fa7a34 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -56,7 +56,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 1905e538c5b..dd354b0265d 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -88,7 +88,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */ diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 7f6d59db3aa..f1f907f3e5a 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -103,7 +103,7 @@ /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 67f19bc1922..fe27ac36a3b 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -108,7 +108,7 @@ */ #define CFG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 567351fcad6..19f1dba0470 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -103,7 +103,7 @@ /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 #define PHYS_SDRAM_2 0x880000000 #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 7bf0ce784c5..592df2795b1 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -54,7 +54,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index b2814664086..077a4d843dc 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -127,7 +127,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 512e0e61aa7..8d0458d1d63 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -30,7 +30,7 @@ */ #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * FLASH and environment organization diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index a2e50c3b8df..5a769e07871 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -32,12 +32,12 @@ * : : * : Specified explicitly by CONFIG_CUSTOM_SYS_INIT_SP_ADDR * : - * Specified explicitly by CONFIG_SYS_SDRAM_BASE + * Specified explicitly by CFG_SYS_SDRAM_BASE * * NOTES: * - Stack starts from CONFIG_CUSTOM_SYS_INIT_SP_ADDR and grows down, - * i.e. towards CONFIG_SYS_SDRAM_BASE but nothing stops it from crossing - * that CONFIG_SYS_SDRAM_BASE in which case data won't be really saved on + * i.e. towards CFG_SYS_SDRAM_BASE but nothing stops it from crossing + * that CFG_SYS_SDRAM_BASE in which case data won't be really saved on * stack any longer and values popped from stack will contain garbage * leading to unexpected behavior, typically but not limited to: * - "Returning" back to bogus caller function @@ -50,16 +50,16 @@ #define DCCM_BASE 0x80000000 #define DCCM_SIZE SZ_128K -#define CONFIG_SYS_SDRAM_BASE DCCM_BASE -#define CONFIG_SYS_SDRAM_SIZE DCCM_SIZE +#define CFG_SYS_SDRAM_BASE DCCM_BASE +#define CFG_SYS_SDRAM_SIZE DCCM_SIZE #define ROM_BASE CONFIG_SYS_MONITOR_BASE #define ROM_SIZE SZ_256K #define RAM_DATA_BASE SYS_INIT_SP_ADDR -#define RAM_DATA_SIZE CONFIG_SYS_SDRAM_SIZE - \ +#define RAM_DATA_SIZE CFG_SYS_SDRAM_SIZE - \ (SYS_INIT_SP_ADDR - \ - CONFIG_SYS_SDRAM_BASE) - \ + CFG_SYS_SDRAM_BASE) - \ CONFIG_SYS_MALLOC_LEN - \ CONFIG_ENV_SIZE #endif /* _CONFIG_IOT_DEVKIT_H_ */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index 9f54f259994..2a0b0c7163a 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -16,7 +16,7 @@ #include <environment/ti/k3_dfu.h> /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 /* FLASH Configuration */ #define CONFIG_SYS_FLASH_BASE 0x000000000 diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 932d7d3c8cb..e690ef95906 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -17,7 +17,7 @@ #include <environment/ti/k3_dfu.h> /* DDR Configuration */ -#define CONFIG_SYS_SDRAM_BASE1 0x880000000 +#define CFG_SYS_SDRAM_BASE1 0x880000000 /* SPL Loader Configuration */ #if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 7d36a25dc23..db1daee1363 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -7,7 +7,7 @@ /* * DDR Setup */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ +#define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05) @@ -17,7 +17,7 @@ /* * Manually set up DDR parameters */ -#define CONFIG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */ +#define CFG_SYS_SDRAM_SIZE 0x80000000 /* 2048 MiB */ /* * The reserved memory diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index ad9853ab6b3..b5913ed7000 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -20,7 +20,7 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index c8423fdfb0a..dbf038cefa0 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -163,10 +163,10 @@ */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define SPD_EEPROM_ADDRESS 0x54 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ +#define CFG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ /****************************************************************************** * (PRAM usage) diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index b3e1fc2a864..e2808ec02dc 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -14,7 +14,7 @@ /* RAM */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h index a2aedefcec2..73b59517621 100644 --- a/include/configs/kontron-sl-mx8mm.h +++ b/include/configs/kontron-sl-mx8mm.h @@ -17,7 +17,7 @@ /* RAM */ #define PHYS_SDRAM DDR_CSD1_BASE_ADDR #define PHYS_SDRAM_SIZE (SZ_4G) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 6acd2f79253..9b452818c1e 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -64,7 +64,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 7ed1f153c23..bbf0761814b 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -21,7 +21,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL /* early stack pointer */ diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index c401fd32169..967de66f3c9 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -67,7 +67,7 @@ #define PHYS_SDRAM_1_SIZE (512 * SZ_1M) #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index b0e49ad6df0..de1fc0bfa4c 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -86,7 +86,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 1f642fbecc3..bee064c6f38 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -85,7 +85,7 @@ "bootscript=source ${bootscraddr}\0" /* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CFG_SYS_SDRAM_BASE 0xc0000000 #include <asm/arch/hardware.h> diff --git a/include/configs/librem5.h b/include/configs/librem5.h index dbd7d107dae..3a2c508ffac 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -82,7 +82,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xc0000000 /* 3GB LPDDR4 one Rank */ diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 28372d41590..b9134508853 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -7,7 +7,7 @@ #define __CONFIG_LINKIT_SMART_7688_H /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 1d51b87b68b..d1ebd99ae14 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -87,7 +87,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 196e024b57e..f0a9e9ab315 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -9,7 +9,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 809f9ae8c8d..07124370775 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL /*SPI device */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 674bcbeb758..c19ed2f43ec 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -10,7 +10,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 9ad3a120118..54555b34dd4 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -10,7 +10,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 /* * QIXIS Definitions diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 4f77acdaede..d74936d1281 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -10,7 +10,7 @@ #include "ls1012a_common.h" /* DDR */ -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x40000000 /* * I2C IO expander diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 3579f9c8437..49a77fd6b6b 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -42,7 +42,7 @@ #define SDRAM_CFG_BI 0x00000001 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* * Serial Port diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 45665115f66..1f5a80ff085 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -20,7 +20,7 @@ #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 1e2db12a83f..49546066115 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -57,7 +57,7 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* Serial Port */ #define CFG_SYS_NS16550_CLK get_serial_clock() diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 323feb6e333..d77224934c0 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -60,7 +60,7 @@ #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* * IFC Definitions diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 587f23be587..064c4f069cb 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -15,7 +15,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL /* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index df6338298b4..e940dff9988 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -34,7 +34,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index b09588f4796..ce254d8b3f1 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -34,7 +34,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL #define CPU_RELEASE_ADDR secondary_boot_addr diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 2117b081168..f8eaee881d0 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -32,7 +32,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* * SMP Definitinos diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index c79a50795b8..21c097ecbbd 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -19,7 +19,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 8b2b7479c11..ad85e2de6ed 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -17,8 +17,8 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL -#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE 0x200000000UL +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 1734f323f92..cbdb2fa1357 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -20,7 +20,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/malta.h b/include/configs/malta.h index 2dd34ea7313..c9aee00cd35 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -22,11 +22,11 @@ */ #ifdef CONFIG_64BIT -# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +# define CFG_SYS_SDRAM_BASE 0xffffffff80000000 #else -# define CONFIG_SYS_SDRAM_BASE 0x80000000 +# define CFG_SYS_SDRAM_BASE 0x80000000 #endif -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 MiB */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index db84302231a..5ad945b5589 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -47,6 +47,6 @@ */ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_SDRAM_SIZE SZ_1G +#define CFG_SYS_SDRAM_SIZE SZ_1G #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index f9f0825f6f8..8aa3b0cd808 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -214,7 +214,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index c6ce8837474..2422cbf9f0b 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -17,7 +17,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/meesc.h b/include/configs/meesc.h index cd3910ee4ba..2e07886c194 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -44,8 +44,8 @@ #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM -#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM0 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) diff --git a/include/configs/meson64.h b/include/configs/meson64.h index 726f33c26c2..6331b7615db 100644 --- a/include/configs/meson64.h +++ b/include/configs/meson64.h @@ -36,7 +36,7 @@ #define STDIN_CFG "serial" #endif -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 /* ROM USB boot support, auto-execute boot.scr at scriptaddr */ #define BOOTENV_DEV_ROMUSB(devtypeu, devtypel, instance) \ diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 4c7cfac8af7..3def93d61e8 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -9,7 +9,7 @@ #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index bd35378800b..ac5ff9289a5 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -49,7 +49,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #define PHYS_SDRAM_2 0xc0000000 diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index c76e1fcaed9..65cd6f5bc4c 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_MT7620_H #define __CONFIG_MT7620_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/mt7621.h b/include/configs/mt7621.h index e09e9c82eb8..1211bb47488 100644 --- a/include/configs/mt7621.h +++ b/include/configs/mt7621.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_MT7621_H #define __CONFIG_MT7621_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED 0x1c000000 diff --git a/include/configs/mt7622.h b/include/configs/mt7622.h index fd8e30acf59..e5d60e1cd2b 100644 --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h @@ -15,7 +15,7 @@ /* SPL -> Uboot */ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index 73093f94d2b..39a7ba76633 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -21,7 +21,7 @@ #define MMC_SUPPORTS_TUNING /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* This is needed for kernel booting */ #define FDT_HIGH "0xac000000" diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index bb12ebfe4fd..9c5034f5f08 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_MT7628_H #define __CONFIG_MT7628_H -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x80000 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 668dc3c4f74..d330adbc01b 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -25,7 +25,7 @@ /* UBoot -> Kernel */ /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 diff --git a/include/configs/mt7981.h b/include/configs/mt7981.h index 9f26b0ba7bb..249f0b9662d 100644 --- a/include/configs/mt7981.h +++ b/include/configs/mt7981.h @@ -16,6 +16,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #endif diff --git a/include/configs/mt7986.h b/include/configs/mt7986.h index 4fbd57a573d..990e411a640 100644 --- a/include/configs/mt7986.h +++ b/include/configs/mt7986.h @@ -16,6 +16,6 @@ #define CONFIG_SYS_UBOOT_START CONFIG_TEXT_BASE /* DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #endif diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h index 7cabbef9288..8a8bc85ca70 100644 --- a/include/configs/mt8518.h +++ b/include/configs/mt8518.h @@ -10,8 +10,8 @@ #define __MT8518_H /* DRAM definition */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* Uboot definition */ diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index e870fc810cb..e45bfd76b6e 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -27,7 +27,7 @@ */ /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* * NS16550 Configuration diff --git a/include/configs/mvebu_alleycat-5.h b/include/configs/mvebu_alleycat-5.h index 41bdfae6c31..9c4038be8b0 100644 --- a/include/configs/mvebu_alleycat-5.h +++ b/include/configs/mvebu_alleycat-5.h @@ -9,7 +9,7 @@ #include <asm/arch/soc.h> /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x200000000 +#define CFG_SYS_SDRAM_BASE 0x200000000 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 115200, 230400, 460800, 921600 } diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 6d3cb99b2df..7641b562219 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -13,7 +13,7 @@ */ /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 5debd9117c6..358e06fd207 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* additions for new ARM relocation support */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 /* auto boot */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index dd303a17d61..aa3d7a1a3fc 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -10,7 +10,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Status LED */ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 4c0531212ed..f597cdb3056 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -13,7 +13,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* Max 128 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environments */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index 140f5e98c52..bc8c8933704 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -13,7 +13,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* UBI and NAND partitioning */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 95afb350ec3..2229980db37 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -112,7 +112,7 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 77835639720..e84bac67ef7 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -60,7 +60,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 3c9b2ad58ee..9e837a38833 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -95,7 +95,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index b26613a2ea8..52ff7b00b43 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -96,7 +96,7 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CFG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 1db4d6c01b1..3c4ba095e4e 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -85,7 +85,7 @@ #include <config_distro_bootcmd.h> /* Physical Memory Map */ -#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index a6cefab5508..9c160c41ece 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -27,7 +27,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index bc9fab12909..711b5a334aa 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -139,7 +139,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index ca1d077437b..3c2621d8c91 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -82,7 +82,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 44a5eeff198..a3a12aeb390 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -82,7 +82,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_2G -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index a41e428eb8a..f0e239fdb6e 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -78,7 +78,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index c655671ee1b..a0f9c537e5d 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -106,7 +106,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 65f0a5c9966..8199b4b8319 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -108,7 +108,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 604923ec2b7..827385c65e2 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -102,7 +102,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index af176583814..c39b3572b84 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -81,7 +81,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 62e8e629911..362de482f57 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -26,7 +26,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM 0x60000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index e93824928b3..9ef1eea5e61 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -26,7 +26,7 @@ #define PHYS_SDRAM 0x60000000 #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index 273f938554d..cdd12866ac0 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -22,7 +22,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index ec5339d930a..9d098113164 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -90,7 +90,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 2623f99f8d0..9ad4f590697 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -161,7 +161,7 @@ * FLASH and environment organization */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 @@ -170,7 +170,7 @@ */ #define SDRAM_SIZE 0x10000000 /* 256 MB */ -#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) +#define SDRAM_END (CFG_SYS_SDRAM_BASE + SDRAM_SIZE) #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ #define KERNEL_OFFSET 0x40000 /* 256 kB */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 9dc05d80ec2..8d39d75a42b 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -30,7 +30,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index ea407c9f6f1..080c659b6ec 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -23,7 +23,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/nsim.h b/include/configs/nsim.h index d469ef83c24..b930a538640 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -13,8 +13,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_256M +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_256M /* * Console configuration diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 00f7d871271..5ac951a370a 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -7,7 +7,7 @@ #include "mx6_common.h" #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 0fa7490e7de..b475354bbc6 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -14,6 +14,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x00180000 #endif -#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +#define CFG_SYS_SDRAM_BASE 0xffffffff80000000 #endif /* __OCTEON_COMMON_H__ */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index ab1eb787e70..03d1a8e7b5f 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -10,7 +10,7 @@ /** Maximum size of image supported for bootm (and bootable FIT images) */ /** Memory base address */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_TEXT_BASE /** Stack starting address */ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 38f99ab2167..58275ccffa0 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -36,7 +36,7 @@ /** Maximum size of image supported for bootm (and bootable FIT images) */ /** Memory base address */ -#define CONFIG_SYS_SDRAM_BASE CONFIG_TEXT_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_TEXT_BASE /** Stack starting address */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index babd3ca9631..ce8ea583fa1 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -17,9 +17,9 @@ #define CONFIG_SYS_PL310_BASE 0x10502000 #endif -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #include <linux/sizes.h> diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 15646297423..d2d7fca5445 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -10,7 +10,7 @@ #include <configs/exynos5420-common.h> #include <configs/exynos5-common.h> -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define TZPC_BASE_OFFSET 0x10000 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 2b47d4ca376..5b0d87a3367 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -154,7 +154,7 @@ /* defines for SPL */ /* additions for new relocation code, must added to all boards */ -#define CONFIG_SYS_SDRAM_BASE 0xc0000000 +#define CFG_SYS_SDRAM_BASE 0xc0000000 #include <asm/arch/hardware.h> diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h index 3ff8187b5df..5b097e9fef2 100644 --- a/include/configs/openpiton-riscv64.h +++ b/include/configs/openpiton-riscv64.h @@ -14,7 +14,7 @@ #include <linux/sizes.h> /* Environment options */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* --------------------------------------------------------------------- * Board boot configuration diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index b3cdd2f1ebe..53889d699b2 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -14,7 +14,7 @@ #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR /* Physical Memory Map */ -#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/origen.h b/include/configs/origen.h index 36aaa7c14fb..6633d541a31 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -11,8 +11,8 @@ #include <configs/exynos4-common.h> /* ORIGEN has 4 bank of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* Power Down Modes */ diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h index b0233b96b06..8d0311cfb3b 100644 --- a/include/configs/owl-common.h +++ b/include/configs/owl-common.h @@ -11,7 +11,7 @@ #define _OWL_COMMON_CONFIG_H_ /* SDRAM Definitions */ -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_BASE 0x0 /* Some commands use this as the default load address */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 6e8ac1b98df..14d702e1efe 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -125,13 +125,13 @@ #define SPD_EEPROM_ADDRESS 0x52 #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G +#define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G #else -#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G +#define CFG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G #endif -#define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) +#define CFG_SYS_SDRAM_SIZE (1u << (CFG_SYS_SDRAM_SIZE_LAW - 19)) #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE /* Default settings for DDR3 */ #ifndef CONFIG_TARGET_P2020RDB diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 6267dc729ab..85cedde0988 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -34,7 +34,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index e13b5df0fab..f7e36f22ce8 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -36,7 +36,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE SZ_256M -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index a04a03a7e18..586cddf4184 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -118,7 +118,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * SZ_1M) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pcm058.h b/include/configs/pcm058.h index 14cbfde28bf..cf705dcb197 100644 --- a/include/configs/pcm058.h +++ b/include/configs/pcm058.h @@ -15,7 +15,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index 7a8d3c63d44..bfc0011fbf9 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -20,7 +20,7 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_POWER_TPS65090_EC diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 2c749ac2143..09c6b4f8dd5 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -20,7 +20,7 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index c98393b7c75..ac68c933a06 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -64,7 +64,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h index 49cd9d4b3c6..aedaf806e5e 100644 --- a/include/configs/phycore_imx8mp.h +++ b/include/configs/phycore_imx8mp.h @@ -63,7 +63,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 4ea16d6115a..d9abbbc28b3 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -23,7 +23,7 @@ (CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CONFIG_SYS_INIT_RAM_SIZE) /* SDRAM Configuration (for final code, data, stack, heap) */ -#define CONFIG_SYS_SDRAM_BASE 0x88000000 +#define CFG_SYS_SDRAM_BASE 0x88000000 /* Memory Test */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index f95beeb214a..fc2cab960c6 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -91,7 +91,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 85772ba6e83..22b4976d722 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -91,7 +91,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index b3a38d8a940..f5b9eed2bcd 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -93,7 +93,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 17af19d49dc..91baff96386 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -67,7 +67,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x80000 -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index adb2f43ea4d..3fbddd903a3 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -78,22 +78,22 @@ /* Memory Device Register -> SDRAM */ #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE -#define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH -#define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR -#define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL -#define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ -#define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ @@ -160,6 +160,6 @@ "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ "" -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #endif diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 4352a242de3..c1f6334d6a1 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -90,22 +90,22 @@ /* Memory Device Register -> SDRAM */ #define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM #define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE -#define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH -#define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ -#define CONFIG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL7 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL8 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL9 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR -#define CONFIG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL10 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL -#define CONFIG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL11 0 /* SDRAM_BASE */ #define CONFIG_SYS_SDRC_TR_VAL2 1200 /* SDRAM_TR */ -#define CONFIG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ +#define CFG_SYS_SDRAM_VAL12 0 /* SDRAM_BASE */ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ @@ -184,6 +184,6 @@ "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ "" -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #endif diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index a7deaa32137..4a0a16818ed 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -20,8 +20,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x70000000 -#define CONFIG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_BASE 0x70000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 05253d59efd..365fdd30c08 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -11,7 +11,7 @@ #endif #define CONFIG_SYS_BOOTMAPSZ (0x30 << 20) -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_BASE 0x0 /* Default environemnt variables */ #define CONFIG_SERVERIP 192.168.0.1 diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h index 2e206542f8d..1c11685f49e 100644 --- a/include/configs/pomelo.h +++ b/include/configs/pomelo.h @@ -9,7 +9,7 @@ #define __POMELO_CONFIG_H__ /* SDRAM Bank #1 start address */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* SIZE of malloc pool */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index f9decb2a4c2..bee1ef64948 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -36,7 +36,7 @@ #define DDR_BASE 0x00000000 #define PHYS_SDRAM_1 DDR_BASE #define PHYS_SDRAM_1_SIZE 0x80000000 /* 2GB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Console I/O Buffer Size */ diff --git a/include/configs/px30_common.h b/include/configs/px30_common.h index 8b151ef1883..99376155b49 100644 --- a/include/configs/px30_common.h +++ b/include/configs/px30_common.h @@ -14,7 +14,7 @@ #define GICD_BASE 0xff131000 #define GICC_BASE 0xff132000 -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index 535762ecb24..a67af73fd56 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -10,7 +10,7 @@ /* Physical memory map */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* GUIDs for capsule updatable firmware images */ #define QEMU_ARM_UBOOT_IMAGE_GUID \ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 9fc51fdfd76..e7c810957d6 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -31,7 +31,7 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_HWCONFIG diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h index d81e5d6c862..72f35cc0542 100644 --- a/include/configs/qemu-riscv.h +++ b/include/configs/qemu-riscv.h @@ -8,7 +8,7 @@ #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 406ee6282c5..f6ee7201eba 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -6,8 +6,8 @@ /* SCIF */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x8C000000 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE 0x8C000000 +#define CFG_SYS_SDRAM_SIZE 0x04000000 /* Address of u-boot image in Flash */ #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index 3a38e0656de..61b9447ea5f 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -17,8 +17,8 @@ /* console */ #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } -#define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) -#define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) +#define CFG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) +#define CFG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) /* Timer */ #define CONFIG_TMU_TIMER diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 7432cffb5a5..58530725978 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -26,8 +26,8 @@ /* MEMORY */ #define DRAM_RSV_SIZE 0x08000000 -#define CONFIG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) -#define CONFIG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) +#define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE) +#define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE) #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 6616396777a..b4c19727478 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -10,7 +10,7 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE) diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index 9297184bded..99c86edeaa4 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -11,7 +11,7 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (1024UL << 20UL) #define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 12d4bc65d7e..fac27a7d27c 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -14,7 +14,7 @@ /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_MAX_SIZE 0x80000000 /* usb mass storage */ diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 6fe1b2d9a2e..334fb3affa5 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -13,7 +13,7 @@ /* spl size 32kb sram - 2kb bootrom */ -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 4fb86b69a8e..6889ba591b3 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -12,7 +12,7 @@ #define CONFIG_IRAM_BASE 0x10080000 -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) #define SDRAM_MAX_SIZE 0x80000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 81f16edbad6..4aa7e0449db 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -15,7 +15,7 @@ /* RAW SD card / eMMC locations. */ -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0xfe000000 diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h index 263d1bd180c..4b510b13991 100644 --- a/include/configs/rk3308_common.h +++ b/include/configs/rk3308_common.h @@ -10,7 +10,7 @@ #define CONFIG_IRAM_BASE 0xfff80000 -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define SDRAM_BANK_SIZE (2UL << 30) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 1e214e4ebe1..132b7d0fe9b 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -11,7 +11,7 @@ #define CONFIG_IRAM_BASE 0xff090000 /* FAT sd card locations. */ -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 37e0c1d936c..92cdc1a51fb 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -11,7 +11,7 @@ #include <asm/arch-rockchip/hardware.h> #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xff000000 #define CONFIG_IRAM_BASE 0xff8c0000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 2f9aee58197..78f624d31ca 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -21,7 +21,7 @@ /* RAW SD card / eMMC locations. */ /* FAT sd card locations. */ -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf8000000 #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h index 15e81523402..d43dc2580e4 100644 --- a/include/configs/rk3568_common.h +++ b/include/configs/rk3568_common.h @@ -10,7 +10,7 @@ #define CONFIG_IRAM_BASE 0xfdcc0000 -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 #define SDRAM_MAX_SIZE 0xf0000000 #define ENV_MEM_LAYOUT_SETTINGS \ diff --git a/include/configs/rpi.h b/include/configs/rpi.h index cd8fe8b518b..2c24944d9c3 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -23,7 +23,7 @@ #endif /* Memory layout */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_UBOOT_BASE CONFIG_TEXT_BASE /* * The board really has 256M. However, the VC (VideoCore co-processor) shares @@ -31,7 +31,7 @@ * smaller amount of RAM is present in order to avoid stomping on the area * the VC uses. */ -#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CFG_SYS_SDRAM_SIZE SZ_128M /* Devices */ /* LCD */ diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 83c3167f38d..76836add302 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -15,7 +15,7 @@ #define CONFIG_SYS_TIMER_BASE 0x10350020 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) -#define CONFIG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 /* rockchip ohci host driver */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index ae94f0ecc56..e071d4da5e8 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -18,7 +18,7 @@ /*----------------------------------------------------------------------- * System memory Configuration */ -#define CONFIG_SYS_SDRAM_BASE 0x71000000 +#define CFG_SYS_SDRAM_BASE 0x71000000 /* * "(0x40000000 - CONFIG_SYS_RESERVE_MEM_SIZE)" has been used in @@ -55,7 +55,7 @@ * Starting kernel ... * ... */ -#define CONFIG_SYS_SDRAM_SIZE (0xb0000000 - CONFIG_SYS_SDRAM_BASE) +#define CFG_SYS_SDRAM_SIZE (0xb0000000 - CFG_SYS_SDRAM_BASE) #define BMP_LOAD_ADDR 0x78000000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index de4510aa434..ed891ab22a9 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -14,7 +14,7 @@ #include <asm/arch/cpu.h> /* get chip and board defs */ /* DRAM Base */ -#define CONFIG_SYS_SDRAM_BASE 0x30000000 +#define CFG_SYS_SDRAM_BASE 0x30000000 /* Text Base */ @@ -114,7 +114,7 @@ "dfu_alt_info=" CONFIG_DFU_ALT "\0" /* Goni has 3 banks of DRAM, but swap the bank */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE /* OneDRAM Bank #0 */ #define PHYS_SDRAM_1_SIZE (80 << 20) /* 80 MB in Bank #0 */ #define PHYS_SDRAM_2 0x40000000 /* mDDR DMC1 Bank #1 */ #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in Bank #1 */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 668b52600e8..614d04fda07 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -14,8 +14,8 @@ /* Keep L2 Cache Disabled */ /* Universal has 2 banks of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ diff --git a/include/configs/sam9x60_curiosity.h b/include/configs/sam9x60_curiosity.h index afb1e3d0f10..75302bf5c05 100644 --- a/include/configs/sam9x60_curiosity.h +++ b/include/configs/sam9x60_curiosity.h @@ -17,7 +17,7 @@ #define CONFIG_USART_ID 0 /* ignored in arm */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x8000000 /* 128 MB */ #endif diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index 7c5bfdb2e6d..22813d4c544 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -23,8 +23,8 @@ */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h index de6c92ed7d4..f826eab9ff2 100644 --- a/include/configs/sama5d27_wlsom1_ek.h +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -16,8 +16,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* SPL */ diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h index ebdb39273ef..01ed1a3c8e7 100644 --- a/include/configs/sama5d2_icp.h +++ b/include/configs/sama5d2_icp.h @@ -15,8 +15,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 #ifdef CONFIG_SD_BOOT /* u-boot env in sd/mmc card */ diff --git a/include/configs/sama5d2_ptc_ek.h b/include/configs/sama5d2_ptc_ek.h index 09cc4dddb2a..2e3c1ea4006 100644 --- a/include/configs/sama5d2_ptc_ek.h +++ b/include/configs/sama5d2_ptc_ek.h @@ -16,8 +16,8 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* NAND Flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 1c9af9b6759..4b13a101170 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -24,8 +24,8 @@ #define ATMEL_PMC_UHP (1 << 6) /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index afb9b9a2fbf..3f58928565f 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -31,8 +31,8 @@ #endif /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* SerialFlash */ diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 0daadec5536..084cb4def66 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -12,8 +12,8 @@ #include "at91-sama5_common.h" /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index d59899f0baa..cbc1c0f4651 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -12,8 +12,8 @@ #include "at91-sama5_common.h" /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 /* NAND flash */ #ifdef CONFIG_CMD_NAND diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 3f905bf2d77..68fa31fe76f 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x60000000 -#define CONFIG_SYS_SDRAM_SIZE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x60000000 +#define CFG_SYS_SDRAM_SIZE 0x20000000 #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 0dcb2ebc316..5a7f5e135b5 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -13,8 +13,8 @@ /* Size of our emulated memory */ #define SB_CONCAT(x, y) x ## y #define SB_TO_UL(s) SB_CONCAT(s, UL) -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE \ +#define CFG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_SIZE \ (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20) #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index c9dd7509cb2..31552f4619d 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -33,7 +33,7 @@ /* Physical Memory Map */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ -#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_DRAM_1 /* Platform/Board specific defs */ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h index 2e5592cf94d..5ad2124bdda 100644 --- a/include/configs/sifive-unleashed.h +++ b/include/configs/sifive-unleashed.h @@ -11,7 +11,7 @@ #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 85fab927195..f4b1a16019e 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -11,7 +11,7 @@ #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_STANDALONE_LOAD_ADDR 0x80200000 diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h index 7159fc35d52..974531ea0d8 100644 --- a/include/configs/sipeed-maix.h +++ b/include/configs/sipeed-maix.h @@ -8,8 +8,8 @@ #include <linux/sizes.h> -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_SIZE SZ_8M +#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_SIZE SZ_8M #ifndef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 7c8f1676be2..d2bc73a400e 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -45,8 +45,8 @@ * SDRAM: 1 bank, 64 MB, base address 0x20000000 * Already initialized before u-boot gets started. */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M) +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE (64 * SZ_1M) /* * Perform a SDRAM Memtest from the start of SDRAM diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 12c2e1f6159..0392530c0ad 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -14,7 +14,7 @@ #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 /* DRAM Memory Banks */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index ba562b23780..64963eebe5c 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -16,7 +16,7 @@ /* input clock of PLL: SMDKC100 has 12MHz input clock */ /* DRAM Base */ -#define CONFIG_SYS_SDRAM_BASE 0x30000000 +#define CFG_SYS_SDRAM_BASE 0x30000000 /* Text Base */ @@ -77,7 +77,7 @@ */ /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */ /*----------------------------------------------------------------------- diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 0b1f0c5f54c..af0c8200fc2 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -11,7 +11,7 @@ #include "exynos4-common.h" /* High Level Configuration Options */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* Handling Sleep Mode*/ #define S5P_CHECK_SLEEP 0x00000BAD @@ -23,13 +23,13 @@ /* SMDKV310 has 4 bank of DRAM */ #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) +#define PHYS_SDRAM_2 (CFG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_3 (CFG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE -#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) +#define PHYS_SDRAM_4 (CFG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE /* FLASH and environment organization */ diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index faa13c65216..44b9109d442 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -38,7 +38,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 7c35c912e59..9b1cb372ece 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -21,8 +21,8 @@ /* CPU */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 -#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS6 +#define CFG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM diff --git a/include/configs/sniper.h b/include/configs/sniper.h index 6054fa42c1a..95516800793 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -32,7 +32,7 @@ * Memory */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* * I2C diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 70a24ed267e..2656c977673 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -38,7 +38,7 @@ * in U-Boot pre-reloc is higher than in SPL. */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* * U-Boot general configurations diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 2b2d78b8c8e..9403e2f4306 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -70,7 +70,7 @@ */ #define PHYS_SDRAM_1 0x0 #define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE 0 +#define CFG_SYS_SDRAM_BASE 0 /* * Serial / UART configurations diff --git a/include/configs/socrates.h b/include/configs/socrates.h index a60ac6d1a3c..c628860eac7 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -55,7 +55,7 @@ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_VERY_BIG_RAM /* I2C addresses of SPD EEPROMs */ @@ -73,7 +73,7 @@ #define CONFIG_SYS_DDR_CONFIG_2 0x04400000 #define CONFIG_SYS_DDR_CONFIG 0xC3008000 #define CONFIG_SYS_DDR_CLK_CONTROL 0x03800000 -#define CONFIG_SYS_SDRAM_SIZE 256 /* in Megs */ +#define CFG_SYS_SDRAM_SIZE 256 /* in Megs */ /* * Flash on the LocalBus diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index dcb88a3a730..008aa500107 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -53,7 +53,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 1e966a23227..806323e375d 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -11,7 +11,7 @@ /* ram memory-related information */ #define PHYS_SDRAM_1 0x40000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x3E000000 #define CONFIG_SYS_HZ_CLOCK 750000000 /* 750 MHz */ diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index 07a5bfc8a86..d7111493142 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -13,7 +13,7 @@ /* * Configuration of the external SRAM memory used by U-Boot */ -#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE +#define CFG_SYS_SDRAM_BASE STM32_DDR_BASE /* * For booting Linux, use the first 256 MB of memory, since this is diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index b809f9322ad..f78ce41ed85 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -13,7 +13,7 @@ /* * Configuration of the external SRAM memory used by U-Boot */ -#define CONFIG_SYS_SDRAM_BASE STM32_DDR_BASE +#define CFG_SYS_SDRAM_BASE STM32_DDR_BASE /* * For booting Linux, use the first 256 MB of memory, since this is diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index ba49075ce06..234327e017b 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -56,10 +56,10 @@ /* * Start addresses for the final memory configuration * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 + * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0 */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ #define CONFIG_SYS_DRAM_TEST @@ -75,8 +75,8 @@ * the maximum mapped by the Linux kernel during initialization ?? */ /* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ - (CONFIG_SYS_SDRAM_SIZE << 20)) +#define CONFIG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + \ + (CFG_SYS_SDRAM_SIZE << 20)) /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash @@ -89,8 +89,8 @@ CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) #define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) -#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ +#define CONFIG_SYS_CACHE_ACR2 (CFG_SYS_SDRAM_BASE | \ + CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \ CF_ACR_EN | CF_ACR_SM_ALL) #define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ CF_CACR_ICINVA | CF_CACR_EUSP) diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 567aa1ffe43..b2dcb6058b1 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -10,7 +10,7 @@ /* ram memory-related information */ #define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_1_SIZE 0x00198000 /* user interface */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index cd2a74fb52d..e1a66f53ff5 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -42,13 +42,13 @@ */ #ifdef CONFIG_MACH_SUN9I #define SDRAM_OFFSET(x) 0x2##x -#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 #elif defined(CONFIG_MACH_SUNIV) #define SDRAM_OFFSET(x) 0x8##x -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #else #define SDRAM_OFFSET(x) 0x4##x -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* V3s do not have enough memory to place code at 0x4a000000 */ #endif @@ -66,7 +66,7 @@ /* FIXME: this may be larger on some SoCs */ #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */ -#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE +#define PHYS_SDRAM_0 CFG_SYS_SDRAM_BASE #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */ /* mmc config */ diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h index 63d897d090a..daa9bbec88a 100644 --- a/include/configs/synquacer.h +++ b/include/configs/synquacer.h @@ -11,7 +11,7 @@ /* * SDRAM (for initialize) */ -#define CONFIG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ +#define CFG_SYS_SDRAM_BASE (0x80000000) /* Start address of DDR3 */ #define PHYS_SDRAM_SIZE (0x7c000000) /* Default size (2GB - Secure memory) */ #define CONFIG_VERY_BIG_RAM /* SynQuacer supports up to 64GB */ diff --git a/include/configs/taurus.h b/include/configs/taurus.h index dd1fe0af7cd..1aba986e1e6 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -41,8 +41,8 @@ * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE (128 * SZ_1M) /* * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 92ee920346b..cd1309b3b88 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -13,8 +13,8 @@ */ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CFG_SYS_SDRAM_SIZE SZ_128M /* * UART configuration diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index 7f197851d0a..2d8bde1cee8 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -13,7 +13,7 @@ /* General configuration */ /* Physical Memory Map */ -#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 92df457e818..7e764b0000b 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -40,7 +40,7 @@ #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 655fcb0011b..76b496303f3 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -68,6 +68,6 @@ /* Defines for SPL */ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SYS_SDRAM_SIZE SZ_2G +#define CFG_SYS_SDRAM_SIZE SZ_2G #endif /* _CONFIG_THEADORABLE_H */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index cf2efdbe230..1f60b9b4979 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -13,7 +13,7 @@ /* Link Definitions */ /* SMP Spin Table Definitions */ -#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#define CPU_RELEASE_ADDR (CFG_SYS_SDRAM_BASE + 0x7fff0) /* PL011 Serial Configuration */ @@ -30,7 +30,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Initial environment variables */ #define UBOOT_IMG_HEAD_SIZE 0x40 diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index fc78077014b..e5b23d2a54c 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -69,7 +69,7 @@ #define PHYS_DRAM_1_SIZE 0x20000000 /* 512MB */ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /** * Platform/Board specific defs diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 1bd2a1874b8..4a7c3d5b449 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -20,7 +20,7 @@ #define V_SCLK (V_OSCK >> 1) #define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /** * Platform/Board specific defs diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index b289b9e26a0..d54c208ef66 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -64,7 +64,7 @@ * initial stack pointer in our SRAM. Otherwise, we can define * CONFIG_NR_DRAM_BANKS before including this file. */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* If DM_I2C, enable non-DM I2C support */ diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h index ab6cd063321..a609aa3a2aa 100644 --- a/include/configs/total_compute.h +++ b/include/configs/total_compute.h @@ -23,7 +23,7 @@ /* Top 48MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x03000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define PHYS_SDRAM_2 0x8080000000 #define PHYS_SDRAM_2_SIZE 0x180000000 diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 22d783c325b..13789819917 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_SYS_SDRAM_BASE 0xa0000000 +#define CFG_SYS_SDRAM_BASE 0xa0000000 #define CONFIG_SYS_INIT_RAM_ADDR 0xbd000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index a65ebfb4dea..f8e3a2d017a 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -268,7 +268,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/trats.h b/include/configs/trats.h index ca318687783..23dcf20c1f4 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -16,8 +16,8 @@ #endif /* TRATS has 4 banks of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* Tizen - partitions definitions */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index f324ea7ebeb..9c6433ccfd8 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -17,8 +17,8 @@ #endif /* TRATS2 has 4 banks of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE +#define CFG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM_1 CFG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* Tizen - partitions definitions */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index f549f9f7ad0..4ca8eafc914 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -8,7 +8,7 @@ #ifndef _CONFIG_TURRIS_MOX_H #define _CONFIG_TURRIS_MOX_H -#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define CFG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_BAUDRATE_TABLE { 300, 600, 1200, 1800, 2400, 4800, \ 9600, 19200, 38400, 57600, 115200, \ 230400, 460800, 500000, 576000, \ diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 268c737e7eb..c1e80b44c85 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -49,7 +49,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index 147224806fc..f73092661a1 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -57,7 +57,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 2cdc3fbf737..d2fd23e1d91 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -25,8 +25,8 @@ */ /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 -#define CONFIG_SYS_SDRAM_SIZE 0x04000000 +#define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 +#define CFG_SYS_SDRAM_SIZE 0x04000000 #define CONFIG_SYS_INIT_RAM_SIZE (16 * 1024) #define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index c381934f31a..e944e78603e 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -60,7 +60,7 @@ #define PHYS_SDRAM CSD0_BASE_ADDR #define PHYS_SDRAM_SIZE (gd->ram_size) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 338d8af8fb3..d9e5dfaceaf 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -14,13 +14,13 @@ #define CFG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ) -#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) +#define CFG_SYS_SDRAM_SIZE (128 * SZ_1M) #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT) -#define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M) +#define CFG_SYS_SDRAM_SIZE (256 * SZ_1M) #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16) -#define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M) +#define CFG_SYS_SDRAM_SIZE (512 * SZ_1M) #else #error Unknown DDR size - please add! #endif diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index f513dade6aa..b209d97e5ec 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -60,7 +60,7 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #endif -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 /* SDRAM configuration */ #define PHYS_SDRAM 0x40000000 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index fea4329d23c..1b9f2ca26f6 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -69,7 +69,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G) #define PHYS_SDRAM_2 0x100000000 diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 0c11b6b3331..9a46d50c6f3 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -96,7 +96,7 @@ /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO #define PHYS_SDRAM_2 (0x880000000) diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 5d773060d82..ef136c75a83 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -135,7 +135,7 @@ #define PHYS_SDRAM_2_SIZE 0x20000000 /* 512 MB */ /* additions for new relocation code */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Basic environment settings */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 215149af2e0..7b526f725af 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -123,7 +123,7 @@ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/vinco.h b/include/configs/vinco.h index a1572967618..df0e269b5d2 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -24,8 +24,8 @@ #define CONFIG_SYS_TIMER_COUNTER 0xfc06863c /* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x20000000 -#define CONFIG_SYS_SDRAM_SIZE 0x4000000 +#define CFG_SYS_SDRAM_BASE 0x20000000 +#define CFG_SYS_SDRAM_SIZE 0x4000000 /* MMC */ diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index a0846b3f7c9..7555d97c814 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -23,7 +23,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 2107bec6587..38b940d35ea 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -7,7 +7,7 @@ #define __VOCORE2_CONFIG_H__ /* RAM */ -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index b4c757fd921..3acef221327 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -89,7 +89,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/warp7.h b/include/configs/warp7.h index a4b12dc55ed..cba215c379f 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -84,7 +84,7 @@ /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 054eb89d49c..32555c9b6af 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -16,8 +16,8 @@ /* * Memory configurations */ -#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE -#define CONFIG_SYS_SDRAM_SIZE SZ_128M +#define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE +#define CFG_SYS_SDRAM_SIZE SZ_128M #define CONFIG_RTC_DS1374 diff --git a/include/configs/xea.h b/include/configs/xea.h index 19ccf633c40..87f628d4ab8 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -23,7 +23,7 @@ /* Memory configuration */ #define PHYS_SDRAM_1 0x40000000 /* Base address */ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Extra Environment */ #define CONFIG_HOSTNAME "xea" diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h index 364dae0cd93..612436aeb48 100644 --- a/include/configs/xenguest_arm64.h +++ b/include/configs/xenguest_arm64.h @@ -11,7 +11,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS -#undef CONFIG_SYS_SDRAM_BASE +#undef CFG_SYS_SDRAM_BASE #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/xilinx_zynqmp_mini_nand.h b/include/configs/xilinx_zynqmp_mini_nand.h index d2c0e91b32e..1b6e26ee396 100644 --- a/include/configs/xilinx_zynqmp_mini_nand.h +++ b/include/configs/xilinx_zynqmp_mini_nand.h @@ -12,7 +12,7 @@ #include <configs/xilinx_zynqmp_mini.h> -#define CONFIG_SYS_SDRAM_SIZE 0x1000000 -#define CONFIG_SYS_SDRAM_BASE 0x0 +#define CFG_SYS_SDRAM_SIZE 0x1000000 +#define CFG_SYS_SDRAM_BASE 0x0 #endif /* __CONFIG_ZYNQMP_MINI_NAND_H */ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 7d0402feead..613ed959553 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -21,7 +21,7 @@ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_SIZE (128 << 20) -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index b93451cbe07..8739bb24841 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -42,12 +42,12 @@ */ #if XCHAL_HAVE_PTP_MMU || CONFIG_BOARD_SDRAM_SIZE < 0x10000000 -#define CONFIG_SYS_SDRAM_SIZE CONFIG_BOARD_SDRAM_SIZE +#define CFG_SYS_SDRAM_SIZE CONFIG_BOARD_SDRAM_SIZE #else -#define CONFIG_SYS_SDRAM_SIZE 0x10000000 +#define CFG_SYS_SDRAM_SIZE 0x10000000 #endif -#define CONFIG_SYS_SDRAM_BASE MEMADDR(0x00000000) +#define CFG_SYS_SDRAM_BASE MEMADDR(0x00000000) /* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */ @@ -70,12 +70,12 @@ #endif #if defined(CONFIG_MAX_MEM_MAPPED) && \ - CONFIG_MAX_MEM_MAPPED < CONFIG_SYS_SDRAM_SIZE + CONFIG_MAX_MEM_MAPPED < CFG_SYS_SDRAM_SIZE #define XTENSA_SYS_TEXT_ADDR \ (MEMADDR(CONFIG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN) #else #define XTENSA_SYS_TEXT_ADDR \ - (MEMADDR(CONFIG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN) + (MEMADDR(CFG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN) #endif /*==============================*/ diff --git a/include/init.h b/include/init.h index d40d11f33d2..699dc2482c0 100644 --- a/include/init.h +++ b/include/init.h @@ -90,8 +90,8 @@ int dram_init(void); * * If this is not provided, a default implementation will try to set up a * single bank. It will do this if CONFIG_NR_DRAM_BANKS and - * CONFIG_SYS_SDRAM_BASE are set. The bank will have a start address of - * CONFIG_SYS_SDRAM_BASE and the size will be determined by a call to + * CFG_SYS_SDRAM_BASE are set. The bank will have a start address of + * CFG_SYS_SDRAM_BASE and the size will be determined by a call to * get_effective_memsize(). * * Return: 0 if OK, -ve on error diff --git a/include/system-constants.h b/include/system-constants.h index 83b41b384f3..07c3505e8f5 100644 --- a/include/system-constants.h +++ b/include/system-constants.h @@ -12,7 +12,7 @@ #define SYS_INIT_SP_ADDR CONFIG_CUSTOM_SYS_INIT_SP_ADDR #else #ifdef CONFIG_MIPS -#define SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET) +#define SYS_INIT_SP_ADDR (CFG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET) #else #define SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |