diff options
| author | Stefano Babic | 2020-05-10 13:03:56 +0200 |
|---|---|---|
| committer | Stefano Babic | 2020-05-10 13:03:56 +0200 |
| commit | b77d0292ca9f3ca69259dca7e2c5e193a403b289 (patch) | |
| tree | 0af352de3e405f839188aad7acaa9930d18afdd8 /include | |
| parent | 8142a97d541ef1473925b3677d6bf86bcddb69ac (diff) | |
| parent | c5c657644bc35fd6b3d6e5517698721e90646b8d (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'include')
328 files changed, 660 insertions, 1011 deletions
diff --git a/include/bedbug/type.h b/include/bedbug/type.h index b7b447b1fe3..3754c7f2b2a 100644 --- a/include/bedbug/type.h +++ b/include/bedbug/type.h @@ -3,7 +3,7 @@ /* Supporting routines */ int bedbug_puts (const char *); -void bedbug_init (void); +int bedbug_init(void); void bedbug860_init (void); void do_bedbug_breakpoint (struct pt_regs *); void bedbug_main_loop (unsigned long, struct pt_regs *); diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 3948d68014a..6abfe393fc0 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -69,10 +69,5 @@ */ #define CONFIG_SYS_LOAD_ADDR 0xcc000000 /* Half of RAM */ #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MONITOR_BASE - \ - CONFIG_ENV_SIZE - \ - CONFIG_SYS_MALLOC_LEN - \ - 0x10000) #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 97bce43ce43..445eef8b150 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -69,10 +69,5 @@ */ #define CONFIG_SYS_LOAD_ADDR 0xd4000000 /* Half of RAM */ #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MONITOR_BASE - \ - CONFIG_ENV_SIZE - \ - CONFIG_SYS_MALLOC_LEN - \ - 0x10000) #endif /* __CONFIG_H */ diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index abecf90c743..67639458b41 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -128,8 +128,6 @@ unsigned long get_board_ddr_clk(void); #if 0 #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 /* * Config the L3 Cache as L3 SRAM diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 31879f86e59..879173f6f2e 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -56,9 +56,6 @@ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* enable branch predition */ -#define CONFIG_SYS_MEMTEST_START 0x01000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x01ffffff - /* DDR Setup */ #undef CONFIG_SYS_DDR_RAW_TIMING #undef CONFIG_DDR_SPD diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 4fc64a8f187..ac37ae7cb8f 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -94,9 +94,6 @@ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* enable branch predition */ -#define CONFIG_SYS_MEMTEST_START 0x01000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x01ffffff - /* DDR Setup */ #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x54 /* I2C access */ diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index d21537c7735..62ad50bad54 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -105,9 +105,6 @@ #define CONFIG_ADDR_MAP 1 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* DDR Setup */ #define CONFIG_DDR_SPD #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index d1cb003ff53..fc389b8e87f 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -104,9 +104,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x80010000 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 884ed11dbab..f110cac2741 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -144,9 +144,6 @@ #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x00 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #ifdef CONFIG_CF_SBF # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) #else diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 2a905252560..4ab3d4831c7 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -112,9 +112,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 97c09f94c7b..065e1e92818 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -39,9 +39,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */ -#define CONFIG_SYS_MEMTEST_START 0x400 -#define CONFIG_SYS_MEMTEST_END 0x380000 - /* * Clock configuration: enable only one of the following options */ diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 9fc0f5f4d19..e79a7e98dc2 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -84,9 +84,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x00100000 -#define CONFIG_SYS_MEMTEST_START 0x400 -#define CONFIG_SYS_MEMTEST_END 0x380000 - #undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */ #define CONFIG_SYS_FAST_CLK #ifdef CONFIG_SYS_FAST_CLK diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 4f5e6092554..50566290438 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -79,8 +79,6 @@ "" #define CONFIG_SYS_LOAD_ADDR 0x20000 -#define CONFIG_SYS_MEMTEST_START 0x400 -#define CONFIG_SYS_MEMTEST_END 0x380000 #define CONFIG_SYS_CLK 66000000 /* diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 3efed0fb37b..ed93f4ad78a 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -72,8 +72,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x800000 #define CONFIG_BOOTCOMMAND "bootm ffe40000" -#define CONFIG_SYS_MEMTEST_START 0x400 -#define CONFIG_SYS_MEMTEST_END 0x380000 #ifdef CONFIG_MCFFEC # define CONFIG_NET_RETRY_COUNT 5 diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 62b3d3183d0..e7859f334ad 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -77,9 +77,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x20000 -#define CONFIG_SYS_MEMTEST_START 0x400 -#define CONFIG_SYS_MEMTEST_END 0x380000 - #define CONFIG_SYS_CLK 64000000 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index 9ae38ff3cf0..b934dc13889 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -120,9 +120,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x80010000 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d0ddd089af8..5c88f09f64f 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -116,9 +116,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x40010000 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index fe0f5b84fd2..6297aea143d 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -116,9 +116,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x40010000 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 62e34538606..cdf169f6a79 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -178,8 +178,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400) -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #define CONFIG_SYS_DRAM_TEST #if defined(CONFIG_CF_SBF) || defined(CONFIG_SYS_NAND_BOOT) diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 7b48c662be6..8d0b1db73e5 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -152,9 +152,6 @@ #define CONFIG_SYS_SDRAM_MODE 0x008D0000 #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0x44 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #ifdef CONFIG_CF_SBF # define CONFIG_SERIAL_BOOT # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 34653f7a464..6e43522fda3 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -201,9 +201,6 @@ #define CONFIG_SYS_SDRAM_MODE 0x00010033 #define CONFIG_SYS_SDRAM_DRV_STRENGTH 0xAA -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #ifdef CONFIG_CF_SBF # define CONFIG_SERIAL_BOOT # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index f5c007127ef..406830c98d5 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -159,9 +159,6 @@ # define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_DRAMSZ #endif -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index ccc88ac316d..cd8dd67043f 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -147,9 +147,6 @@ # define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_DRAMSZ #endif -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) - #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 72533bc8072..557c2ebcdb4 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -60,9 +60,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x00002000 -#define CONFIG_SYS_MEMTEST_END 0x00800000 - #define CONFIG_SYS_LOAD_ADDR 0x200000 #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 29561c41016..f55e9a09950 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -101,8 +101,6 @@ /* * Memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00001000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* * The reserved memory diff --git a/include/configs/MPC8313ERDB_NAND.h b/include/configs/MPC8313ERDB_NAND.h index ea5762a5ef8..68298533430 100644 --- a/include/configs/MPC8313ERDB_NAND.h +++ b/include/configs/MPC8313ERDB_NAND.h @@ -57,9 +57,6 @@ #define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR #endif -#define CONFIG_SYS_MEMTEST_START 0x00001000 -#define CONFIG_SYS_MEMTEST_END 0x07f00000 - /* Early revs of this board will lock up hard when attempting * to access the PMC registers, unless a JTAG debugger is * connected, or some resistor modifications are made. diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h index 9d4a6716c76..382c39ccb4c 100644 --- a/include/configs/MPC8313ERDB_NOR.h +++ b/include/configs/MPC8313ERDB_NOR.h @@ -29,9 +29,6 @@ #define CONFIG_VSC7385_ENET #define CONFIG_TSEC2 -#define CONFIG_SYS_MEMTEST_START 0x00001000 -#define CONFIG_SYS_MEMTEST_END 0x07f00000 - /* Early revs of this board will lock up hard when attempting * to access the PMC registers, unless a JTAG debugger is * connected, or some resistor modifications are made. diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index 5085a95635e..2c352238682 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -98,8 +98,6 @@ * Memory test */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00040000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00140000 /* * The reserved memory diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index d39ba8f5d95..289cd9a8600 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -85,8 +85,6 @@ * Memory test */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00030000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* * The reserved memory diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index f410763a7ec..bfcff2e4f88 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -85,8 +85,6 @@ * Memory test */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * The reserved memory diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 295cb169903..0a80a60d301 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -18,8 +18,6 @@ #define CONFIG_E300 1 /* E300 Family */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * DDR Setup diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h index 79f2e38e952..79dd9561741 100644 --- a/include/configs/MPC8349EMDS_SDRAM.h +++ b/include/configs/MPC8349EMDS_SDRAM.h @@ -18,8 +18,6 @@ #define CONFIG_E300 1 /* E300 Family */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * DDR Setup diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index d0ae923ec3e..90046fd1ee3 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -144,8 +144,6 @@ */ #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_83XX_DDR_USES_CS0 -#define CONFIG_SYS_MEMTEST_START 0x1000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x2000 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \ | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075) diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index e5b411b12cb..1254b4fc10e 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -107,8 +107,6 @@ * Memory test */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00040000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00140000 /* * The reserved memory diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 2ceb123a078..21bd9f09c17 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -132,8 +132,6 @@ * Memory test */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00040000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x0ef70010 /* * The reserved memory diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 8fc8dfd2b2f..fb115e23457 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -58,9 +58,6 @@ #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00010000 /* skip exception vectors */ -#define CONFIG_SYS_MEMTEST_END 0x1f000000 /* skip u-boot at top of RAM */ - /* * Config the L2 Cache as L2 SRAM */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index a5483dabaf8..2ba73220211 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -58,9 +58,6 @@ #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index f81f4b0e646..b2a32010720 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -32,9 +32,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 4eb2888caea..2092e3da159 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -37,9 +37,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_ENABLE_36BIT_PHYS 1 -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index a68d190f6ab..6e44a072db8 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2004, 2007, 2010-2011 Freescale Semiconductor. + * Copyright 2020 NXP */ /* @@ -46,9 +47,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR @@ -304,12 +302,18 @@ extern unsigned long get_clock_freq(void); /* * I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } +#else +#define CONFIG_SYS_SPD_BUS_NUM 0 +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif +#define CONFIG_SYS_I2C_FSL /* EEPROM */ #define CONFIG_ID_EEPROM diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index d53e156f308..d964b4e1217 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -32,9 +32,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_L2_CACHE /* toggle L2 cache */ #define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index e61c9786c0b..866049febf2 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -57,9 +57,6 @@ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index 3a078a363c3..a0bd5f4d40f 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -35,9 +35,6 @@ extern unsigned long get_clock_freq(void); */ #define CONFIG_ENABLE_36BIT_PHYS 1 -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index da86f94e544..beba848214e 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -47,9 +47,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_HWCONFIG -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L2 Cache as L2 SRAM */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 0f4c7e6f488..65da3d7009b 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -48,9 +48,6 @@ #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x7fffffff - /* * Config the L2 Cache as L2 SRAM */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 8b10a6cfef9..f3d603c6348 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -56,9 +56,6 @@ #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index db05a6cb077..e97d780cea0 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -63,9 +63,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * With the exception of PCI Memory and Rapid IO, most devices will simply * add CONFIG_SYS_PHYS_ADDR_HIGH to the front of the 32-bit VA to get the PA diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index c58b7814ba9..b6f315a47b9 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -27,12 +27,8 @@ /* SCIF */ #define CONFIG_CONS_SCIF0 1 -#define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) - /* Enable alternate, more extensive, memory test */ /* Scratch address used by the alternate memory test */ -#undef CONFIG_SYS_MEMTEST_SCRATCH /* Enable temporary baudrate change while serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 60e8904d429..f578e0bd875 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -113,8 +114,6 @@ #if defined(CONFIG_PCI) #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ /* @@ -122,19 +121,13 @@ * Memory space is mapped 1-1, but I/O space must start from 0. */ /* controller 1, Slot 1, tgtid 1, Base address a000 */ -#define CONFIG_SYS_PCIE1_NAME "mini PCIe Slot" #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull #else -#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0x80000000 #endif -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc00000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc00000ull #else @@ -142,27 +135,45 @@ #endif /* controller 2, Slot 2, tgtid 2, Base address 9000 */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#else +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 +#endif +#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull +#else +#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 +#endif + +#if !defined(CONFIG_DM_PCI) +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */ +#define CONFIG_SYS_PCIE1_NAME "mini PCIe Slot" +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#else +#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000 +#endif +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ + #if defined(CONFIG_TARGET_P1010RDB_PA) #define CONFIG_SYS_PCIE2_NAME "PCIe Slot" #elif defined(CONFIG_TARGET_P1010RDB_PB) #define CONFIG_SYS_PCIE2_NAME "mini PCIe Slot" #endif -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_PCIE2_MEM_BUS 0xc0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull #else #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 #endif #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull -#else -#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 #endif #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -188,9 +199,6 @@ #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x1fffffff - /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_DDR_SPD @@ -522,17 +530,22 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif #define I2C_PCA9557_ADDR1 0x18 #define I2C_PCA9557_ADDR2 0x19 #define I2C_PCA9557_BUS_NUM 0 +#define CONFIG_SYS_I2C_FSL /* I2C EEPROM */ #if defined(CONFIG_TARGET_P1010RDB_PB) diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 5cc2e069797..e99d509a36b 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -100,9 +100,6 @@ #define CONFIG_L2_CACHE #define CONFIG_BTB -#define CONFIG_SYS_MEMTEST_START 0x00000000 -#define CONFIG_SYS_MEMTEST_END 0x7fffffff - #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR @@ -359,8 +356,8 @@ #endif /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 @@ -368,6 +365,8 @@ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}} +#endif +#define CONFIG_SYS_I2C_FSL /* * I2C2 EEPROM diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h index 8ed351c5dc7..2f3831e2599 100644 --- a/include/configs/P1023RDB.h +++ b/include/configs/P1023RDB.h @@ -42,9 +42,6 @@ extern unsigned long get_clock_freq(void); #define CONFIG_ENABLE_36BIT_PHYS -#define CONFIG_SYS_MEMTEST_START 0x01000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x02000000 - /* Implement conversion of addresses in the LBC */ #define CONFIG_SYS_LBC_LBCR 0x00000000 #define CONFIG_SYS_LBC_LCRR LCRR_CLKDIV_8 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 0dcba7deeae..09427776e28 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2011-2012 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -74,8 +75,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #endif #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 /* * Config the L3 Cache as L3 SRAM @@ -267,14 +266,20 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif +#define CONFIG_SYS_I2C_FSL + /* * RapidIO diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index b17113ab9a8..8f31fc4c745 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -80,8 +80,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ -#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ /* diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index 462e62c7c20..f4440e57646 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -80,8 +80,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ -#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ /* diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 20c0534f5a3..5f358c13eae 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -147,9 +148,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L3 Cache as L3 SRAM */ @@ -437,14 +435,20 @@ unsigned long get_board_ddr_clk(void); #endif /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif + +#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define I2C_MUX_PCA_ADDR 0x77 #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ @@ -460,6 +464,7 @@ unsigned long get_board_ddr_clk(void); /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 +#define CONFIG_SYS_I2C_DVI_BUS_NUM 0 /* * RTC configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 094795cc6d5..c96d6e5f35e 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -162,9 +163,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L3 Cache as L3 SRAM */ @@ -434,15 +432,20 @@ unsigned long get_board_ddr_clk(void); #endif /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif +#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define I2C_PCA6408_BUS_NUM 1 #define I2C_PCA6408_ADDR 0x20 diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index cda8251036e..ca6ae776fa4 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -1,5 +1,6 @@ /* * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * See file CREDITS for list of people who contributed to this * project. @@ -90,9 +91,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L3 Cache as L3 SRAM */ @@ -360,6 +358,8 @@ unsigned long get_board_ddr_clk(void); #endif /* I2C */ + +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */ @@ -374,6 +374,9 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 #define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000 #define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100 +#endif + +#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define I2C_MUX_PCA_ADDR 0x77 #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ @@ -385,6 +388,7 @@ unsigned long get_board_ddr_clk(void); /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 +#define CONFIG_SYS_I2C_DVI_BUS_NUM 0 /* * RTC configuration diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index bc651186578..aa7bf7d1193 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ #ifndef __CONFIG_H @@ -27,6 +28,7 @@ #define CONFIG_SPL_SKIP_RELOCATE #define CONFIG_SPL_COMMON_INIT_DDR #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#undef CONFIG_DM_I2C #endif #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 @@ -185,9 +187,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L3 Cache as L3 SRAM */ @@ -459,8 +458,8 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ #define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */ #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C3_SPEED 400000 @@ -473,7 +472,12 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 #define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000 #define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif +#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x8 @@ -484,6 +488,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg /* LDI/DVI Encoder for display */ #define CONFIG_SYS_I2C_LDI_ADDR 0x38 #define CONFIG_SYS_I2C_DVI_ADDR 0x75 +#define CONFIG_SYS_I2C_DVI_BUS_NUM 0 /* * RTC configuration diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 96801e5f099..aed2e87a1a1 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2011-2013 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -385,8 +386,8 @@ unsigned long get_board_ddr_clk(void); /* * I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F @@ -399,6 +400,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_I2C2_SPEED 100000 #define CONFIG_SYS_FSL_I2C3_SPEED 100000 #define CONFIG_SYS_FSL_I2C4_SPEED 100000 +#endif + +#define CONFIG_SYS_I2C_FSL + #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ #define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */ #define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */ diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a90ea11a2f8..619b287258f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -99,9 +100,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - #if defined(CONFIG_SPIFLASH) #elif defined(CONFIG_SDCARD) #define CONFIG_SYS_MMC_ENV_DEV 0 @@ -333,8 +331,8 @@ unsigned long get_board_ddr_clk(void); /* * I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F @@ -347,6 +345,13 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FSL_I2C2_SPEED 100000 #define CONFIG_SYS_FSL_I2C3_SPEED 100000 #define CONFIG_SYS_FSL_I2C4_SPEED 100000 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif + +#define CONFIG_SYS_I2C_FSL + #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ #define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */ #define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */ diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 91a7c70356e..5f91a52bbe9 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -280,6 +280,19 @@ unsigned long get_board_ddr_clk(void); #endif /* I2C */ +#ifndef CONFIG_DM_I2C +#define CONFIG_SYS_I2C +#else +#undef CONFIG_SYS_I2C +#undef CONFIG_SYS_FSL_I2C2_OFFSET +#undef CONFIG_SYS_FSL_I2C2_SLAVE +#undef CONFIG_SYS_FSL_I2C2_SPEED +#undef CONFIG_SYS_FSL_I2C_SLAVE +#undef CONFIG_SYS_FSL_I2C_SPEED +#undef CONFIG_SYS_FSL_I2C_OFFSET +#endif + +#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 100000 /* I2C speed */ #define CONFIG_SYS_FSL_I2C2_SPEED 100000 /* I2C2 speed */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 31cb1cf34a8..f051998b0ff 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -80,9 +81,6 @@ #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L3 Cache as L3 SRAM */ @@ -159,12 +157,18 @@ #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif + +#define CONFIG_SYS_I2C_FSL /* * General PCI diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index f557a3c9362..40fe62fdf0b 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -30,8 +30,6 @@ #undef CONFIG_SPD_EEPROM /* do not use SPD EEPROM for DDR setup */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * FLASH on the Local Bus diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 68276a15a74..5086077afb5 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -164,9 +164,6 @@ #define CONFIG_ENABLE_36BIT_PHYS -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x1fffffff - #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index 5b035c7ec5a..48dfe68ff9e 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -112,8 +112,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x300000 /* memtest works on 63 MB in DRAM */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + 0x03F00000) /* * Static memory controller configuration diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index 71c7fe929d3..2c316a76e1c 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -224,8 +224,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x300000 /* memtest works on 63 MB in DRAM */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + 0x03F00000) /* * Static memory controller configuration diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index deb4374d1c4..d44028d510c 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -183,10 +183,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 6087a29ef4c..5c00191f4d4 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -145,9 +145,6 @@ #define CONFIG_SYS_MAXARGS 32 /* max number of command */ /* args */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 89c82cee07e..cc5e8314c71 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -153,9 +153,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ /* Physical Memory Map */ #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) diff --git a/include/configs/amcore.h b/include/configs/amcore.h index bc1fc8c7b01..641d8fdbd53 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -32,9 +32,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x20000 /* default load address */ -#define CONFIG_SYS_MEMTEST_START 0x0 -#define CONFIG_SYS_MEMTEST_END 0x1000000 - #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CLK 45000000 diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 07ba195a126..4902d07247e 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -35,7 +35,5 @@ /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x83f00000 #endif /* __CONFIG_H */ diff --git a/include/configs/ap143.h b/include/configs/ap143.h index d6c22d54893..c79e050dc9c 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -39,7 +39,5 @@ /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x83f00000 #endif /* __CONFIG_H */ diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 73378b95f3f..0d2c484bb9c 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -41,7 +41,5 @@ /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x83f00000 #endif /* __CONFIG_H */ diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index 40037157339..08d34db1061 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -83,9 +83,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -#define CONFIG_SYS_MEMTEST_START 0x88000000 -#define CONFIG_SYS_MEMTEST_END 0x89000000 - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 eMMC */ #define CONFIG_SYS_MMC_ENV_PART 1 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index fb0037444f4..034eb07eaa9 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -210,10 +210,6 @@ #undef CONFIG_SYS_MAXARGS #define CONFIG_SYS_MAXARGS 48 -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 351b27094a6..c26cf89f5ff 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -54,8 +54,6 @@ #define PHYS_SDRAM_2 0xB0000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10)) -#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */ -#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \ + PHYS_SDRAM_1_SIZE - 0x0100000) diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 5f4a4f854f9..2674cb8b76b 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -407,10 +407,6 @@ #define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index e56929628bc..f85cd981409 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -40,10 +40,6 @@ #define SCIF4_BASE 0xe6c80000 #define CONFIG_SCIF_A -#define CONFIG_SYS_MEMTEST_START (ARMADILLO_800EVA_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 504 * 1024 * 1024) -#undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE #define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE) diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index e1128043b02..7eec226173e 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -171,9 +171,6 @@ /* Defines memory range for test */ -#define CONFIG_SYS_MEMTEST_START 0x40020000 -#define CONFIG_SYS_MEMTEST_END 0x41ffffff - /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index e52f7e440bb..37b9cc3b6fc 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -57,10 +57,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE SZ_32M -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END \ - (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - SZ_256K) - /* * LowLevel Init */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 3156118e963..e27c276a460 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -108,9 +108,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 39b879b3b1b..c3fe41636bf 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -95,9 +95,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index c08845b3c8d..85bfacb7acc 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -208,9 +208,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index ee207cfcca2..8e2a7631f41 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -69,9 +69,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index caa487b038b..7ee569521e6 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -68,9 +68,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x26e00000 - /* USB host */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 1da26049fd9..92b87a2b492 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -66,9 +66,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_SYS_USE_DATAFLASH /* bootstrap + u-boot + env + linux in dataflash on CS0 */ diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index d85a4867648..eb94a190728 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -67,9 +67,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x26e00000 - #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env + linux in nandflash */ #define CONFIG_BOOTCOMMAND "nand read " \ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 45049621710..34fc6b616e7 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -91,8 +91,6 @@ /* * memtest works on 512 MB in DRAM */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* * FLASH and environment organization diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index 0566892e157..f88172a05c5 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -241,9 +241,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80010000 -#define CONFIG_SYS_MEMTEST_END 0x87C00000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical memory map */ diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 7ee38a7ef9b..fd29c5d0f1e 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -22,7 +22,6 @@ #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) -#undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* FLASH */ diff --git a/include/configs/boston.h b/include/configs/boston.h index e5dc0c8e328..b9a9965eec3 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -35,9 +35,6 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000) -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000) - #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 6c073ab383d..e95769b2d72 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -90,8 +90,6 @@ BUR_COMMON_ENV \ /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CONFIG_SYS_INIT_SP_OFFSET \ diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h index 63a7581d682..459712190a0 100644 --- a/include/configs/caddy2.h +++ b/include/configs/caddy2.h @@ -26,8 +26,6 @@ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * DDR Setup diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 254b3a5a760..2ad54f49072 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -167,10 +167,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1 GB */ #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */ -#define CONFIG_SYS_MEMTEST_START 0xA0000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_1_SIZE >> 2)) - /* Console buffer and boot args */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 797fcb14590..bd4456aa02e 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -187,10 +187,6 @@ "fi; " \ "else run netboot; fi" -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 0f9c2ac53a3..e6b4e233d62 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -25,8 +25,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 #define CONFIG_SYS_LOAD_ADDR 0x81000000 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x88000000 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index d47bdd228d6..b923bae9b28 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -111,9 +111,6 @@ "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \ "echo USB boot attempt ...; run usbbootscript; " -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index e62130f8ec0..302907dcfb4 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -24,8 +24,6 @@ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR #define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CONFIG_SYS_INIT_SP_OFFSET \ diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 5bd9a49f4d0..fffea0da183 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -148,10 +148,7 @@ #define CONFIG_TIMESTAMP #define CONFIG_SYS_AUTOLOAD "no" -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ /* works on */ -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index a9f5e5e8a55..fe23c2396c9 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -155,9 +155,6 @@ from which user programs will be started */ * --- */ -#define CONFIG_SYS_MEMTEST_START 0x400 -#define CONFIG_SYS_MEMTEST_END 0x380000 - /* --- * Low Level Configuration Settings * (address mappings, register initial values, etc.) diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 2a76f576a87..2d3b4c18177 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -113,9 +113,6 @@ "videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \ "vidargs=video=mxsfb:640x480M-16@60" -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x08000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 311ed439f61..03bb1701f9d 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -114,9 +114,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x80200000 -#define CONFIG_SYS_MEMTEST_START 0x88000000 -#define CONFIG_SYS_MEMTEST_END 0x89000000 - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 eMMC */ #define CONFIG_SYS_MMC_ENV_PART 1 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 4cdd3c53afb..2d649e6e219 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -189,10 +189,6 @@ #undef CONFIG_SYS_MAXARGS #define CONFIG_SYS_MAXARGS 48 -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 7c00f78ef19..09722f47e78 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -194,9 +194,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x0c000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 111bb27126a..29827f1ee84 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -86,9 +86,6 @@ #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ #define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ -#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ - #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000 diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index b03ccaf0941..7d17bd8e6a0 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -138,9 +138,6 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MEMTEST_START 0x80010000 -#define CONFIG_SYS_MEMTEST_END 0x87C00000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index d62c784e5b7..5fbe7732018 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -121,9 +121,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) -#define CONFIG_SYS_MEMTEST_START 0x00000000 -#define CONFIG_SYS_MEMTEST_END 0x3fffffff - #ifdef CONFIG_TRAILBLAZER #define CONFIG_SPD_EEPROM #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index b2c86ff722b..091f3c07d1d 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2009-2012 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -87,8 +88,6 @@ #endif #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 /* * Config the L3 Cache as L3 SRAM @@ -276,14 +275,19 @@ #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif +#define CONFIG_SYS_I2C_FSL /* * RapidIO diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h index 49fee9249bf..9ab92e699dc 100644 --- a/include/configs/cyrus.h +++ b/include/configs/cyrus.h @@ -75,8 +75,6 @@ /* test POST memory test */ #undef CONFIG_POST -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 /* * Config the L3 Cache as L3 SRAM diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 5bd5cd85c84..4d651264dd2 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -42,10 +42,8 @@ #define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE #define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) /* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 894a8d7973f..15d6884ca5d 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -62,8 +62,6 @@ #endif /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/db-88f6281-bp.h b/include/configs/db-88f6281-bp.h index 749adb29075..cc51e6646ee 100644 --- a/include/configs/db-88f6281-bp.h +++ b/include/configs/db-88f6281-bp.h @@ -69,8 +69,6 @@ /* * Other required minimal configurations */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ -#define CONFIG_SYS_MEMTEST_END 0x007fffff /* (_8M - 1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ /* diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 4c0229e4cc8..f1f2be0797b 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -24,8 +24,6 @@ #define CONFIG_SYS_MALLOC_LEN SZ_1M #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_64M -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index baf1a73b956..21af126c4bd 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -138,9 +138,6 @@ #define CONFIG_BOOTCOMMAND "run autoboot" /* Boot Argument Buffer Size */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 0x01000000) /* 16MB */ /* SRAM config */ #define CONFIG_SYS_SRAM_START 0x40200000 diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 087d020cdd3..efb3cfee352 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -137,10 +137,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Environment */ #endif /* __DH_IMX6_CONFIG_H */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 61c321c1320..d441f28d4af 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -54,8 +54,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x20000 -#define CONFIG_SYS_MEMTEST_START 0x100000 -#define CONFIG_SYS_MEMTEST_END 0x400000 /*#define CONFIG_SYS_DRAM_TEST 1 */ #undef CONFIG_SYS_DRAM_TEST diff --git a/include/configs/edison.h b/include/configs/edison.h index 3e174e9aa53..3918a9fc1c3 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -25,9 +25,6 @@ #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START 0x00100000 -#define CONFIG_SYS_MEMTEST_END 0x01000000 - /* Environment */ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 0 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 60dfee81b71..cfee9740452 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -182,8 +182,6 @@ */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 -#define CONFIG_SYS_MEMTEST_START 0x00400000 -#define CONFIG_SYS_MEMTEST_END 0x007fffff #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Enable command line editing */ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 95c04c37970..fe63bcaaa62 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -74,10 +74,6 @@ #define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10800000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 62561116bbe..24a0025eda3 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -49,10 +49,6 @@ #define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 39a4a066ad0..d121b395dfe 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -37,9 +37,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE \ - - CONFIG_SYS_MALLOC_LEN) /* 512kB on-chip NOR flash */ # define CONFIG_SYS_MAX_FLASH_BANKS 1 diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h index 7a0ea753be0..0ff01af833b 100644 --- a/include/configs/evb_ast2500.h +++ b/include/configs/evb_ast2500.h @@ -11,9 +11,6 @@ #include <configs/aspeed-common.h> -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x300000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x5000000) - #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE /* Memory Info */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 5911a8a6399..dff6a26f3b9 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -49,8 +49,6 @@ /* Boot Argument Buffer Size */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) #define CONFIG_RD_LVL diff --git a/include/configs/flea3.h b/include/configs/flea3.h index fded5a11dac..02fedb1823f 100644 --- a/include/configs/flea3.h +++ b/include/configs/flea3.h @@ -79,9 +79,6 @@ /* Print Buffer Size */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x10000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index 6412efcbf88..261749db8d3 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -44,8 +44,6 @@ 230400, 460800, 921600 } /* RAM */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x80400000 /* Memory usage */ #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 6a7a93144bf..f8df0c8ceb4 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -20,8 +20,6 @@ * Memory test * TODO: Migrate! */ -#define CONFIG_SYS_MEMTEST_START 0x00001000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x07e00000 /* * The reserved memory diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 3bf0cd518c1..e40be93ca78 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -144,10 +144,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index f1ea729eb38..001e9d385ba 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -16,7 +16,6 @@ /* Miscellaneous */ #define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH #define CONFIG_CMDLINE_TAG /* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index d169aa19de4..bf4b3b297ee 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -131,9 +131,6 @@ #define CONFIG_HWCONFIG /* Memory configuration */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 8d16e18d8b6..76add4eba8e 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -51,8 +51,6 @@ * The DRAM is already setup, so do not touch the DT node later. */ #define PHYS_SDRAM_1_SIZE (4089 << 20) -#define CONFIG_SYS_MEMTEST_START 0x100000 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) /* Environment data setup */ diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 5d850929db0..bf1feb8708c 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -90,8 +90,6 @@ /* * Memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00001000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* * The reserved memory diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index b96d4e82adf..3274ff64377 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -240,9 +240,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_MEMTEST_START 0x00001000 -#define CONFIG_SYS_MEMTEST_END 0x00C00000 - #define CONFIG_SYS_LOAD_ADDR 0x100000 #define CONFIG_LOADS_ECHO #define CONFIG_TIMESTAMP diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 82ac4242bbf..67fa4a5a09f 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -70,8 +70,6 @@ /* malloc() len */ #define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024) /* memtest start address */ -#define CONFIG_SYS_MEMTEST_START 0xA0000000 -#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */ #define PHYS_SDRAM_1 0xA0000000 /* DDR Start */ #define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index 18327fb4c3d..69b7f3378eb 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -104,8 +104,6 @@ #define CONFIG_BOOTCOMMAND "run $modeboot" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 2274db0e229..63662dd18d4 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -116,10 +116,6 @@ #define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index b6e336a33d9..d4a613d0ada 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -70,8 +70,6 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index 7da2b900529..5982522ecaf 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -123,9 +123,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h index ce73ca6b0ae..395ddf5816b 100644 --- a/include/configs/imx8mn_evk.h +++ b/include/configs/imx8mn_evk.h @@ -126,9 +126,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index e91c71036d7..80e57389614 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -139,10 +139,6 @@ #define PHYS_SDRAM_2 0x100000000 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index ecf4c2e46b7..724d572c228 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -184,10 +184,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_BAUDRATE 115200 #define CONFIG_MXC_UART diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index ac25549a183..b59641e37fc 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -163,9 +163,6 @@ /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */ #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ -#define CONFIG_SYS_MEMTEST_START 0xA0000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_1_SIZE >> 2)) - /* Serial */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h index 9223fc2cde9..89ab0da50cd 100644 --- a/include/configs/integrator-common.h +++ b/include/configs/integrator-common.h @@ -6,8 +6,6 @@ * Common ARM Integrator configuration settings */ -#define CONFIG_SYS_MEMTEST_START 0x100000 -#define CONFIG_SYS_MEMTEST_END 0x10000000 #define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 84594874b88..fde84871787 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -16,10 +16,6 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 8 Byte write page */ #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ - -#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */ - #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ /* Reserve 4 MB for malloc */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 156edfba226..fa9d7b5dfa0 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -37,8 +37,6 @@ #include "asm/arch/config.h" -#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ -#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ /* architecture specific default bootargs */ diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h index cdfb280aeee..4d01f236c31 100644 --- a/include/configs/kmcoge5ne.h +++ b/include/configs/kmcoge5ne.h @@ -51,7 +51,7 @@ /* enable POST tests */ #define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS) #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */ -#define CPM_POST_WORD_ADDR CONFIG_SYS_MEMTEST_END +#define CPM_POST_WORD_ADDR 0x00f00000 #define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */ #define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */ diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index cceabdf6636..0724df154e9 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -35,10 +35,6 @@ /* SCIF */ #define CONFIG_CONS_SCIF4 -#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END \ - (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) -#undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index 0bfa67a7c09..a5f7fab15e2 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -33,10 +33,8 @@ #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ /* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) /* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) /* * Serial Driver info diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index 4276e95dee2..d7ebfeda4c5 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -45,8 +45,6 @@ 230400, 460800, 921600 } /* RAM */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x80400000 /* Memory usage */ #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 6aba6a616ea..fa7d5896f58 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -104,8 +104,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 5943b69716e..869e0ad6b82 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -13,8 +13,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff /* MMC */ #ifdef CONFIG_MMC @@ -33,8 +31,6 @@ #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ CONFIG_SYS_SCSI_MAX_LUN) #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 8a3ebf06f2d..54ea43420ff 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_SDRAM_SIZE 0x20000000 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES @@ -73,7 +71,5 @@ #endif #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #endif /* __LS1012ARDB_H__ */ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 4d4c1a04f29..97d3eb2f3d3 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -22,9 +22,6 @@ #define SYS_SDRAM_SIZE_1024 0x40000000 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_CMD_MEMINFO -#define CONFIG_CMD_MEMTEST -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff /* ENV */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 @@ -121,9 +118,6 @@ "env exists secureboot && esbc_halt;" #endif #define CONFIG_CMD_MEMINFO -#define CONFIG_CMD_MEMTEST -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #include <asm/fsl_secure_boot.h> diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index fb0d1ba6b27..99840dcfc4f 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -13,8 +13,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff /* * QIXIS Definitions @@ -107,8 +105,6 @@ #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #include <asm/fsl_secure_boot.h> #endif /* __LS1012AQDS_H__ */ diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index 0738b243c43..c9d116d4d56 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -14,8 +14,6 @@ #define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff /* ENV */ @@ -55,8 +53,6 @@ #define CONFIG_PCI_SCAN_SHOW #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 0e1eff71d22..031bc6f172f 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -472,9 +472,6 @@ unsigned long get_board_ddr_clk(void); */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - #define CONFIG_SYS_LOAD_ADDR 0x82000000 #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 45ce460dca2..cb56037a412 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -441,9 +441,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - #define CONFIG_SYS_LOAD_ADDR 0x82000000 #define CONFIG_LS102XA_STREAM_ID diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 6905694d102..f9040e661d0 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -26,10 +26,6 @@ #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1 -#define CONFIG_CMD_MEMTEST -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - /* * SMP Definitinos */ diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 5769dc43a93..95bf5fa1024 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -390,9 +390,6 @@ unsigned long get_board_ddr_clk(void); * Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_INIT_SP_OFFSET \ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 9ff248cefad..ff0d5fad9c2 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -409,9 +409,6 @@ unsigned long get_board_ddr_clk(void); * Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff - #define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_INIT_SP_OFFSET \ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 301945fc8c7..3bfd1d2a86a 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -376,8 +376,6 @@ unsigned long get_board_ddr_clk(void); #endif #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 7cb07048498..dec1ff9d7d4 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -278,8 +278,6 @@ #endif #define CONFIG_CMD_MEMINFO -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x9fffffff #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index af6fc3ae7ae..6be88831f04 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -25,8 +25,6 @@ #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) #define PHYS_SDRAM_SIZE (gd->ram_size) #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x8ff00000 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) diff --git a/include/configs/malta.h b/include/configs/malta.h index bb8a44433eb..773d7c23ed8 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -16,7 +16,6 @@ #define CONFIG_PCI_GT64120 #define CONFIG_PCI_MSC01 #define CONFIG_PCNET -#define CONFIG_PCNET_79C973 #define PCNET_HAS_PROM #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 @@ -42,8 +41,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) #define CONFIG_SYS_MALLOC_LEN (128 * 1024) #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 0aee1e1cf6b..ee942a48fc8 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -31,9 +31,6 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h index 2dc3156b266..33172a6b97a 100644 --- a/include/configs/meerkat96.h +++ b/include/configs/meerkat96.h @@ -17,9 +17,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 9d6c3b83006..bd4bac7aab3 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -58,8 +58,6 @@ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) /* diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h index 2f90ab31757..8ddfc6f14d9 100644 --- a/include/configs/microchip_mpfs_icicle.h +++ b/include/configs/microchip_mpfs_icicle.h @@ -54,8 +54,6 @@ /* * memtest works on DRAM */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* When we use RAM as ENV */ diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index cc58e806def..97578cdb823 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -105,8 +105,6 @@ /* * Memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00001000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* * The reserved memory diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index faab0913fc9..fe436cca389 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -45,11 +45,13 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* This is needed for kernel booting */ -#define FDT_HIGH "fdt_high=0xac000000\0" +#define FDT_HIGH "0xac000000" -/* Extra environment variables */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - FDT_HIGH +#define ENV_MEM_LAYOUT_SETTINGS \ + "fdt_high=" FDT_HIGH "\0" \ + "kernel_addr_r=0x84000000\0" \ + "fdt_addr_r=" FDT_HIGH "\0" \ + "fdtfile=mt7623n-bananapi-bpi-r2.dtb" "\0" /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 @@ -57,4 +59,18 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 +#ifdef CONFIG_DISTRO_DEFAULTS + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 1) + +#include <config_distro_bootcmd.h> + +/* Extra environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTENV + +#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/ + #endif diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h index a041ddb79bb..e3a00ed1cf4 100644 --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h @@ -59,8 +59,6 @@ * Other required minimal configurations */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ -#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ -#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index 024a9717087..24a83fdbbe0 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -38,8 +38,6 @@ * Other required minimal configurations */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ -#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ -#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index b72a0a5b9ed..19b5b5b386e 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -39,8 +39,6 @@ * Other required minimal configurations */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ -#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ -#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 174f038be8e..683d442e75b 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -41,8 +41,6 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Memory Test */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2) -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) /* Serial Info */ #define CONFIG_MXC_UART diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 4082a0bd642..f910d6199b2 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -71,8 +71,6 @@ */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x80010000 /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 222d13eb1fd..8f1213fd8af 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -93,9 +93,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x10000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 10aa1bcd87c..182648a0f19 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -155,9 +155,6 @@ * Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x90000000 -#define CONFIG_SYS_MEMTEST_END 0x90010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /*----------------------------------------------------------------------- diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index ff71435776a..b43be1c55c7 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -146,9 +146,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x70010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 0ebff26ba09..e0210047ff5 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -75,9 +75,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x70010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index 2e687b9bdc0..ab02aa072ff 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -100,9 +100,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x70010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 1798a92efc5..2e015ad9f89 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -142,9 +142,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x70010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 196eab05c26..c32f02635b6 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -121,9 +121,6 @@ #define CONFIG_SYS_MAXARGS 48 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x70010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */ diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index 610e6e8a11f..b3322c639ce 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -92,9 +92,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x70010000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical Memory Map */ diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h index 6fd87c2abcd..3d79a7e4376 100644 --- a/include/configs/mx6memcal.h +++ b/include/configs/mx6memcal.h @@ -18,8 +18,6 @@ #undef CONFIG_GENERIC_MMC #undef CONFIG_CMD_FUSE -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) #define CONFIG_MXC_UART diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index 7e6917b9670..ec2ac695158 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -102,8 +102,6 @@ #define CONFIG_ARP_TIMEOUT 200UL /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index ee3b754910c..cb0253c306c 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -154,10 +154,6 @@ #define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 193931b91ba..d889c99d512 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -108,8 +108,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index 8ae1e0a2e63..03c0c88e505 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -103,8 +103,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_128M) /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index dc5e8184431..2c7db39c296 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -91,8 +91,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 3bff496bad2..8633756dd0e 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -123,8 +123,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 1bdd5779403..7927779cc84 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -134,8 +134,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 3d42d26aa49..7e3a5c7cf3b 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -131,8 +131,6 @@ "else run netboot; fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index fa59748776d..7e1e8b02cb7 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -94,9 +94,6 @@ #include <config_distro_bootcmd.h> -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index f6e173d7d53..f7f94044794 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -49,13 +49,10 @@ /* Physical Memory Map */ #define PHYS_SDRAM 0x60000000 -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_LOADADDR 0x60800000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M) - #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "console=ttyLP0\0" \ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index c1b379bdeaf..9216b0948c0 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -53,13 +53,10 @@ #define PHYS_SDRAM 0x60000000 #define PHYS_SDRAM_SIZE SZ_1G -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_LOADADDR 0x60800000 -#define CONFIG_SYS_MEMTEST_END 0x9E000000 - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index e079f8035b8..325c3ee00ce 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -51,8 +51,6 @@ /* Memory sizes */ #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ -#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ -#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */ #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 9ef6ea90a3f..a5ca5f9c4b2 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -130,9 +130,6 @@ BOOTENV /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x10010000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index fd755bbceae..5d1c7bf8353 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -274,9 +274,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); * Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/ - /* default load address */ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) diff --git a/include/configs/novena.h b/include/configs/novena.h index 2b8419563c2..6f964e43076 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 - #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) /* SPL */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index a7e2a3d9a23..03229910b2f 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -29,8 +29,6 @@ #define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) #include <linux/sizes.h> @@ -64,7 +62,6 @@ ""PARTS_BOOT" part 0 1;" \ ""PARTS_ROOT" part 0 2\0" \ -#define CONFIG_SET_DFU_ALT_INFO #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) #define CONFIG_DFU_ALT_BOOT_EMMC \ diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 47c30543f8f..564319c2311 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -76,7 +76,6 @@ /* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */ #define CONFIG_MISC_COMMON -#define CONFIG_SET_DFU_ALT_INFO #define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) /* Set soc_rev, soc_id, board_rev, board_name, fdtfile */ diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 4ad7dc18b10..8dc30be8b72 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -71,8 +71,6 @@ #endif -#define CONFIG_SYS_MTDPARTS_RUNTIME - /* OneNAND config */ #define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index ddf6d790ab3..dd0ea2dbde2 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -178,9 +178,6 @@ /* Miscellaneous configurable options */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ /* FLASH and environment organization */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 04f37559cc9..9a5b9f297c6 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -140,9 +140,6 @@ "run nanddtsboot; " \ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ /* FLASH and environment organization */ #if defined(CONFIG_MTD_RAW_NAND) diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 211078464d9..ecf308e3819 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -48,9 +48,6 @@ BOOTENV \ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ #if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index a4ba7dbcc56..24884b26fb9 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -110,9 +110,6 @@ /* * Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) /* memtest */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_2 + \ - 0x01F00000) /* 31MB */ /*----------------------------------------------------------------------- * FLASH and environment organization diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index aac7f182f25..58fa5ccfa3e 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -37,10 +37,8 @@ #define CONFIG_SPL_BSS_MAX_SIZE 0x1080000 /* memtest start addr */ -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) /* memtest will be run on 16MB */ -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \ DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \ diff --git a/include/configs/origen.h b/include/configs/origen.h index ff9318a81b8..3bedc4784b7 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -20,8 +20,6 @@ #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) #define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index c42f1a9fce7..af278ded9a4 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2010-2011 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ /* @@ -235,9 +236,6 @@ #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ #endif -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x1fffffff - #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR @@ -537,8 +535,8 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) /* I2C */ +#ifndef CONFIG_DM_I2C #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 @@ -546,6 +544,12 @@ #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } +#else +#define CONFIG_I2C_SET_DEFAULT_BUS_NUM +#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0 +#endif + +#define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 #define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 6dc5039560e..e99b41cc884 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -54,9 +54,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_L2_CACHE #define CONFIG_BTB -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x1fffffff - #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 238b03f600e..2156da671b2 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -35,8 +35,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index d2459874706..6aa77f1f5e9 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -43,8 +43,6 @@ #endif /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 290e652ec98..706a8a2a876 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -94,9 +94,6 @@ * memtest works on 8 MB in DRAM after skipping 32MB from * start addr of ram disk */ -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (64 << 20)) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ - + (8 * 1024 * 1024)) /* NS16550 Configuration */ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index d4d6ad2143f..0bfaaf784a6 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -141,9 +141,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80010000 -#define CONFIG_SYS_MEMTEST_END 0x87C00000 - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR /* Physical memory map */ diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index 1a89c56f41a..73edd28f1a6 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -42,8 +42,6 @@ #define CONFIG_SYS_FDT_ADDR 0x89d00000 /* Memory Test */ -#define CONFIG_SYS_MEMTEST_START 0x88000000 -#define CONFIG_SYS_MEMTEST_END 0x88080000 /*---------------------------------------------------------------------- * Commands diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 7cc55cb8d5f..27cbfe276da 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -30,9 +30,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) - /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 27e83b47cd6..b0e2f6ce33a 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -112,9 +112,6 @@ #include <config_distro_bootcmd.h> -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + SZ_128M - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 4dc206566ef..9a987f41500 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -109,9 +109,6 @@ #include <config_distro_bootcmd.h> -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h index cb8338f3847..771fd8db97f 100644 --- a/include/configs/picosam9g45.h +++ b/include/configs/picosam9g45.h @@ -86,9 +86,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_SYS_USE_MMC /* bootstrap + u-boot + env + linux in mmc */ diff --git a/include/configs/platinum.h b/include/configs/platinum.h index 210927f4de0..5e81c4568a1 100644 --- a/include/configs/platinum.h +++ b/include/configs/platinum.h @@ -88,10 +88,6 @@ /* Board startup config */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - PHYS_SDRAM_SIZE - (12 << 20)) - #define CONFIG_BOOTCOMMAND "run bootubi_scr" /* Miscellaneous configurable options */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index f958ceb3053..9a4bfd1e0ec 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -193,9 +193,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #undef CONFIG_SYS_USE_DATAFLASH_CS0 #undef CONFIG_SYS_USE_NANDFLASH #define CONFIG_SYS_USE_FLASH 1 diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 50d953a8e89..7f87edb42d3 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -222,9 +222,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #define CONFIG_SYS_USE_FLASH 1 #undef CONFIG_SYS_USE_DATAFLASH #undef CONFIG_SYS_USE_NANDFLASH diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 8c181e64afd..b0511beb8f9 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -59,9 +59,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 023092e486d..51177f44fee 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -27,10 +27,6 @@ #define GICD_BASE 0xf7011000 #define GICC_BASE 0xf7012000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0x00100000 -#define CONFIG_SYS_MEMTEST_START 0x05000000 -#define CONFIG_SYS_MEMTEST_END 0x0D000000 - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h index e25800a0958..2632d48cc9c 100644 --- a/include/configs/pxa-common.h +++ b/include/configs/pxa-common.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_PXA_COMMON_H__ #define __CONFIG_PXA_COMMON_H__ -#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH - /* * KGDB */ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index 42a25623c37..4227a280c75 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -73,9 +73,6 @@ /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x80800000 - /*----------------------------------------------------------------------- * FLASH and environment organization */ diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h index e4a78fbddad..801ba76b3ec 100644 --- a/include/configs/qemu-mips64.h +++ b/include/configs/qemu-mips64.h @@ -73,9 +73,6 @@ /* default load address */ #define CONFIG_SYS_LOAD_ADDR 0xffffffff81000000 -#define CONFIG_SYS_MEMTEST_START 0xffffffff80100000 -#define CONFIG_SYS_MEMTEST_END 0xffffffff80800000 - /*----------------------------------------------------------------------- * FLASH and environment organization */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 47fb1816932..cfbd472c821 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -24,9 +24,6 @@ #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* Needed to fill the ccsrbar pointer */ /* Virtual address to CCSRBAR */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index afa446f53a4..a8886251e01 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -17,9 +17,6 @@ #define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) - #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) /* Address of u-boot image in Flash */ #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index b562308db8b..e32ab9d7aee 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -25,9 +25,6 @@ #define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) - /* Flash board support */ #define CONFIG_SYS_FLASH_BASE (0xA0000000) #ifdef CONFIG_SYS_R7780MP_OLD_FLASH diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 89a8a44bbe2..f0ae6e67a71 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -48,6 +48,8 @@ #define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00500000\0" \ + "script_offset_f=0xffe000\0" \ + "script_size_f=0x2000\0" \ "pxefile_addr_r=0x00600000\0" \ "fdt_addr_r=0x01f00000\0" \ "kernel_addr_r=0x02080000\0" \ @@ -58,6 +60,7 @@ #endif #include <config_distro_bootcmd.h> +#include <environment/distro/sf.h> #define CONFIG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index b55e09a9ca1..bf8c60d6ddd 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -41,11 +41,26 @@ #define BOOT_TARGET_DHCP(func) #endif +#if CONFIG_IS_ENABLED(CMD_SF) + #define BOOT_TARGET_SF(func) func(SF, sf, 0) +#else + #define BOOT_TARGET_SF(func) +#endif + +#ifdef CONFIG_ROCKCHIP_RK3399 +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_MMC(func) \ + BOOT_TARGET_USB(func) \ + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) \ + BOOT_TARGET_SF(func) +#else #define BOOT_TARGET_DEVICES(func) \ BOOT_TARGET_MMC(func) \ BOOT_TARGET_USB(func) \ BOOT_TARGET_PXE(func) \ BOOT_TARGET_DHCP(func) +#endif #ifdef CONFIG_ARM64 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0" diff --git a/include/configs/rpi.h b/include/configs/rpi.h index b53a4b65d0b..834f1cd2364 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -55,8 +55,6 @@ CONFIG_SYS_SDRAM_SIZE - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_MALLOC_LEN SZ_4M -#define CONFIG_SYS_MEMTEST_START 0x00100000 -#define CONFIG_SYS_MEMTEST_END 0x00200000 #define CONFIG_LOADADDR 0x00200000 #ifdef CONFIG_ARM64 diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h index 53c94ed70e6..5b1504d2dfe 100644 --- a/include/configs/s32v234evb.h +++ b/include/configs/s32v234evb.h @@ -148,9 +148,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "=> " -#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR) -#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 20538df0252..620217f5288 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -147,8 +147,6 @@ #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4000000) /* Goni has 3 banks of DRAM, but swap the bank */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ec9abaf584e..5a80958739d 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -37,8 +37,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 1c13055cdc0..7fda63f71a5 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -43,8 +43,6 @@ /* Memory things - we don't really want a memory test */ #define CONFIG_SYS_LOAD_ADDR 0x00000000 -#define CONFIG_SYS_MEMTEST_START 0x00100000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) #define CONFIG_SYS_FDT_LOAD_ADDR 0x100 #define CONFIG_PHYSMEM diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 9d655848388..55b9a3c1822 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -23,8 +23,6 @@ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * DDR Setup diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index ae2c0033d06..f5462549a52 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -73,8 +73,6 @@ #define CONFIG_ENABLE_36BIT_PHYS 1 #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 #define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 011e5736e27..4ab364ae9a2 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -69,8 +69,6 @@ #endif #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 /* * Base addresses -- Note these are effective addresses where the diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h index 20acc403634..b390c2fc52e 100644 --- a/include/configs/secomx6quq7.h +++ b/include/configs/secomx6quq7.h @@ -18,9 +18,6 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h index c45b33a91a9..7211a2afa68 100644 --- a/include/configs/sh7752evb.h +++ b/include/configs/sh7752evb.h @@ -22,10 +22,6 @@ /* SCIF */ #define CONFIG_CONS_SCIF2 1 -#define CONFIG_SYS_MEMTEST_START (SH7752EVB_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 480 * 1024 * 1024) -#undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE #define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE) diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h index 70e7fb93248..464a5524809 100644 --- a/include/configs/sh7753evb.h +++ b/include/configs/sh7753evb.h @@ -22,10 +22,6 @@ /* SCIF */ #define CONFIG_CONS_SCIF2 1 -#define CONFIG_SYS_MEMTEST_START (SH7753EVB_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 480 * 1024 * 1024) -#undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE #define CONFIG_SYS_SDRAM_BASE (SH7753EVB_SDRAM_BASE) diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 6a34dc7954b..ac6338cec1c 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -25,10 +25,6 @@ /* SCIF */ #define CONFIG_CONS_SCIF2 1 -#define CONFIG_SYS_MEMTEST_START (SH7757LCR_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 224 * 1024 * 1024) -#undef CONFIG_SYS_MEMTEST_SCRATCH #undef CONFIG_SYS_LOADS_BAUD_CHANGE #define CONFIG_SYS_SDRAM_BASE (SH7757LCR_SDRAM_BASE) diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 5122c8bf44f..b6644288063 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -26,8 +26,6 @@ /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE (0x8C000000) #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) /* Flash(NOR) */ #define CONFIG_SYS_FLASH_BASE (0xA0000000) diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index cab28766518..ed931176504 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -54,9 +54,6 @@ * memtest works on 8 MB in DRAM after skipping 32MB from * start addr of ram disk */ -#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ - + (8 * 1024 * 1024)) #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 624ad3b7688..aacdd1263e7 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -69,8 +69,6 @@ * Perform a SDRAM Memtest from the start of SDRAM * till the beginning of the U-Boot position in RAM. */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN \ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index dbdb9a4a07a..20d60636767 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -110,8 +110,6 @@ */ #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5e00000) #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 13e81ee2ffe..336571d4c4e 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -42,8 +42,6 @@ /* Miscellaneous configurable options */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) /* SMDKV310 has 4 bank of DRAM */ diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index b0408a55925..35cd7f69c1d 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -32,8 +32,6 @@ GENERATED_GBL_DATA_SIZE) /* Mem test settings */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) /* NAND Flash */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index ffcfdcaafcd..9b950543084 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -31,8 +31,6 @@ GENERATED_GBL_DATA_SIZE) /* Mem test settings */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) /* NAND Flash */ #define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 410ec80618f..0579a00d40a 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -17,8 +17,6 @@ */ #define PHYS_SDRAM_1 0x0 #define CONFIG_SYS_MALLOC_LEN (64 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE #if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 87c73457a0a..61f7b254b59 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -117,8 +117,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define PHYS_SDRAM_1 0x0 #define PHYS_SDRAM_1_SIZE (1 * 1024 * 1024 * 1024) #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_MEMTEST_START 0 -#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE - 0x200000 /* * Serial / UART configurations diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 4fe67dced85..da60546966c 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -51,8 +51,6 @@ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00400000 -#define CONFIG_SYS_MEMTEST_END 0x00C00000 #define CONFIG_SYS_CCSRBAR 0xE0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 6759f24c083..85c68cdee65 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -73,8 +73,6 @@ "fi" /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 85e498dc668..e74ba6cc34c 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -147,8 +147,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_SYS_MEMTEST_START 0x00800000 -#define CONFIG_SYS_MEMTEST_END 0x04000000 #define CONFIG_SYS_MALLOC_LEN (1024*1024) #define CONFIG_SYS_LOAD_ADDR 0x00800000 diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 2ba4fb1305a..be5afe9c6fa 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -65,11 +65,6 @@ #define CONFIG_SPL_STACK (STM32_SYSRAM_BASE + \ STM32_SYSRAM_SIZE) #endif /* #ifdef CONFIG_SPL */ - -#define CONFIG_SYS_MEMTEST_START STM32_DDR_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_64M) -#define CONFIG_SYS_MEMTEST_SCRATCH (CONFIG_SYS_MEMTEST_END + 4) - /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 @@ -85,13 +80,6 @@ #define CONFIG_SYS_AUTOLOAD "no" #endif -/* Dynamic MTD partition support */ -#if defined(CONFIG_STM32_QSPI) || defined(CONFIG_NAND_STM32_FMC2) -#define CONFIG_SYS_MTDPARTS_RUNTIME -#endif - -#define CONFIG_SET_DFU_ALT_INFO - #ifdef CONFIG_DM_VIDEO #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_BMP_16BPP diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 4df2750a896..b5bfac77f1b 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -103,8 +103,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_SDRAM_SIZE 128 /* SDRAM size in MB */ -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x400) -#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) #define CONFIG_SYS_DRAM_TEST #if defined(CONFIG_CF_SBF) diff --git a/include/configs/strider.h b/include/configs/strider.h index 06a86bbc208..d5f710be592 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -90,8 +90,6 @@ /* * Memory test */ -#define CONFIG_SYS_MEMTEST_START 0x00001000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x07f00000 /* * The reserved memory diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index 81e1e49c928..0058dcd4bba 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -35,9 +35,6 @@ /* Command support defines */ #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ -#define CONFIG_SYS_MEMTEST_START 0x0000 -#define CONFIG_SYS_MEMTEST_END 1024*1024 - /* Misc configuration */ #define CONFIG_BOOTCOMMAND "go 0x40040000" diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 5d087caf31e..976d527a088 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -45,9 +45,6 @@ #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ -#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00400000 - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index a2bb1b55eb1..c13e9979219 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -81,9 +81,6 @@ #define CONFIG_SYS_MAXARGS 32 /* max number of command */ /* args */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) -#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ - 0x01F00000) /* 31MB */ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ /* address */ diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index e95cd0087d3..a283e1e0290 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -131,10 +131,7 @@ /* turn on command-line edit/hist/auto */ -#define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */ /* defaults */ -#define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */ -#define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ /* load address */ diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h index b598fca1ecb..7376b91f550 100644 --- a/include/configs/tbs2910.h +++ b/include/configs/tbs2910.h @@ -30,10 +30,6 @@ #define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024) -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END \ - (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024) - #define CONFIG_SYS_BOOTMAPSZ 0x10000000 /* Serial console */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index f2cdd9c0194..175c55c6138 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -52,9 +52,6 @@ /* Boot Argument Buffer Size */ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) -#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) - /*----------------------------------------------------------------------- * Physical Memory Map */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index dac7e4ad959..4d3c58d1e8f 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -25,9 +25,6 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ -#define CONFIG_SYS_MEMTEST_START MEM_BASE -#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE) - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index cc32729496f..99ddc3e923c 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -87,10 +87,6 @@ /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ - + PHYS_DRAM_1_SIZE - (8 << 12)) - #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default */ /** diff --git a/include/configs/titanium.h b/include/configs/titanium.h index d6ab5e4393e..ec316f325cf 100644 --- a/include/configs/titanium.h +++ b/include/configs/titanium.h @@ -47,9 +47,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20)) - #define CONFIG_HOSTNAME "titanium" #define CONFIG_UBI_PART ubi #define CONFIG_UBIFS_VOLUME rootfs0 diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index 73fdfae4610..0e4a824c424 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -36,10 +36,6 @@ /* FPGA commands that we don't use */ /* Extras */ -#undef CONFIG_SYS_MEMTEST_START -#define CONFIG_SYS_MEMTEST_START 0 -#undef CONFIG_SYS_MEMTEST_END -#define CONFIG_SYS_MEMTEST_END 0x18000000 /* Faster flash, ours may run at 108 MHz */ #undef CONFIG_SPI_FLASH_WINBOND diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 8f13744c322..75e74580675 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -51,8 +51,6 @@ /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x83f00000 #define CONFIG_CMD_MII diff --git a/include/configs/trats.h b/include/configs/trats.h index 37fadc52102..f39a7c726a2 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -27,8 +27,6 @@ #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) /* select serial console configuration */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 8b71c257573..f6593e227b9 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -25,8 +25,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ /* memtest works on */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) /* select serial console configuration */ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 1e4459747d5..83aa3cd4689 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -176,10 +176,6 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - 0x07000000) /* 112 MB */ - #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000) /* @@ -248,5 +244,4 @@ #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ -#define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000 #endif /* __CONFIG_H */ diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index e414f90fe1e..49279fca404 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -45,13 +45,9 @@ * Other required minimal configurations */ #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ -#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ -#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ -#define CONFIG_SYS_ALT_MEMTEST - /* End of 16M scrubbed by training in bootrom */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) diff --git a/include/configs/udoo.h b/include/configs/udoo.h index bf9106e239f..163cbbb54ed 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -38,9 +38,6 @@ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) - /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index f4a2837b391..4b3df0451a9 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -60,8 +60,6 @@ #include <config_distro_bootcmd.h> /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index c0ba647d094..73bf2d19da6 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -73,9 +73,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 - /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_BOOTCOMMAND "nboot 21000000 0" #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 91c8b478b3a..fcf5c67dc89 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -91,9 +91,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_SYS_MEMTEST_START 0x70000000 -#define CONFIG_SYS_MEMTEST_END 0x90000000 - #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) #endif /* __CONFIG_H */ diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 6a2f80c2fb4..d5b2a785bcf 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -38,10 +38,6 @@ #define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_SDRAM_SIZE - SZ_4M) - #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_BOARD_EARLY_INIT_R diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 34726b94253..bdacd818853 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -23,8 +23,6 @@ * On-board devices * */ -#define CONFIG_SYS_MEMTEST_START 0x00001000 -#define CONFIG_SYS_MEMTEST_END 0x07000000 /* * Device configurations diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 82bff3608c5..ca528598f2f 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -102,10 +102,6 @@ #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (PHYS_SDRAM_SIZE >> 1)) - /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 4f3a792f496..09cdd3dab5b 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -7,12 +7,6 @@ #ifndef __VEXPRESS_AEMV8A_H #define __VEXPRESS_AEMV8A_H -#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP -#ifndef CONFIG_SEMIHOSTING -#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING -#endif -#endif - #define CONFIG_REMAKE_ELF /* Link Definitions */ @@ -102,7 +96,7 @@ /* PL011 Serial Configuration */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_PL011_CLOCK 7273800 +#define CONFIG_PL011_CLOCK 7372800 #else #define CONFIG_PL011_CLOCK 24000000 #endif @@ -126,8 +120,6 @@ #endif /* Enable memtest */ -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) /* Initial environment variables */ #ifdef CONFIG_TARGET_VEXPRESS64_JUNO @@ -138,35 +130,33 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_name=norkern\0" \ "kernel_alt_name=Image\0" \ - "kernel_addr=0x80080000\0" \ - "initrd_name=ramdisk.img\0" \ - "initrd_addr=0x84000000\0" \ + "kernel_addr_r=0x80080000\0" \ + "ramdisk_name=ramdisk.img\0" \ + "ramdisk_addr_r=0x88000000\0" \ "fdtfile=board.dtb\0" \ "fdt_alt_name=juno\0" \ - "fdt_addr=0x83000000\0" \ - "fdt_high=0xffffffffffffffff\0" \ - "initrd_high=0xffffffffffffffff\0" \ + "fdt_addr_r=0x80000000\0" \ /* Copy the kernel and FDT to DRAM memory and boot */ -#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \ +#define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr_r} ;"\ "if test $? -eq 1; then "\ " echo Loading ${kernel_alt_name} instead of "\ "${kernel_name}; "\ - " afs load ${kernel_alt_name} ${kernel_addr};"\ + " afs load ${kernel_alt_name} ${kernel_addr_r};"\ "fi ; "\ - "afs load ${fdtfile} ${fdt_addr} ; " \ + "afs load ${fdtfile} ${fdt_addr_r} ;"\ "if test $? -eq 1; then "\ " echo Loading ${fdt_alt_name} instead of "\ "${fdtfile}; "\ - " afs load ${fdt_alt_name} ${fdt_addr}; "\ + " afs load ${fdt_alt_name} ${fdt_addr_r}; "\ "fi ; "\ - "fdt addr ${fdt_addr}; fdt resize; " \ - "if afs load ${initrd_name} ${initrd_addr} ; "\ + "fdt addr ${fdt_addr_r}; fdt resize; " \ + "if afs load ${ramdisk_name} ${ramdisk_addr_r} ; "\ "then "\ - " setenv initrd_param ${initrd_addr}; "\ - " else setenv initrd_param -; "\ + " setenv ramdisk_param ${ramdisk_addr_r}; "\ + " else setenv ramdisk_param -; "\ "fi ; " \ - "booti ${kernel_addr} ${initrd_param} ${fdt_addr}" + "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}" #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP @@ -221,6 +211,11 @@ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #define CONFIG_SYS_MAX_FLASH_BANKS 1 +#ifdef CONFIG_USB_EHCI_HCD +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 +#endif + #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ #define FLASH_MAX_SECTOR_SIZE 0x00040000 diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index e73658a9e6e..ca765579e82 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -111,9 +111,6 @@ #define SYS_ID V2M_SYSREGS #define CONFIG_REVISION_TAG 1 -#define CONFIG_SYS_MEMTEST_START V2M_BASE -#define CONFIG_SYS_MEMTEST_END 0x20000000 - #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_SYS_L2CACHE_OFF 1 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index d52a5a7e833..739219e8f8b 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -162,9 +162,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80010000 -#define CONFIG_SYS_MEMTEST_END 0x87C00000 - /* Physical memory map */ #define PHYS_SDRAM (0x80000000) #define PHYS_SDRAM_SIZE (128 * 1024 * 1024) diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 7120aa64df6..c4db6f4b3c1 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -26,8 +26,6 @@ #include <config_distro_bootcmd.h> /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000) /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index f40c9002e59..c11507e5502 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -26,8 +26,6 @@ #undef CONFIG_MPC83XX_PCI2 /* support for 2nd PCI controller */ #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ -#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest region */ -#define CONFIG_SYS_MEMTEST_END 0x00100000 /* * DDR Setup diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index 8100e4dca7b..5aa3ad8ddf2 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -37,8 +37,6 @@ #define CONFIG_CONS_INDEX 3 /* RAM */ -#define CONFIG_SYS_MEMTEST_START 0x80100000 -#define CONFIG_SYS_MEMTEST_END 0x80400000 /* Memory usage */ #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index a65d23bbe80..9d2bd7b2782 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -29,9 +29,6 @@ #define CONFIG_LBA48 #endif -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/warp.h b/include/configs/warp.h index 68361a6199e..654f8349f4d 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -26,9 +26,6 @@ /* Watchdog */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M) - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 39c00480bd9..60a902b2c74 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -107,9 +107,6 @@ "fi; " \ "fi" -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) - #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h index 36060975c10..fea07056b06 100644 --- a/include/configs/wb45n.h +++ b/include/configs/wb45n.h @@ -61,8 +61,6 @@ /* System */ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ -#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_END 0x23e00000 #ifdef CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env + linux in nandflash */ diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h index ca1619f2511..bb4deeac9b7 100644 --- a/include/configs/wb50n.h +++ b/include/configs/wb50n.h @@ -44,9 +44,6 @@ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) #endif -#define CONFIG_SYS_MEMTEST_START 0x21000000 -#define CONFIG_SYS_MEMTEST_END 0x22000000 - /* NAND flash */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 54d211ab664..421384d9ba5 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -29,8 +29,6 @@ #define CONFIG_SYS_MALLOC_LEN SZ_1M #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_128M -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + SZ_32K) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - SZ_1M) #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_32K) diff --git a/include/configs/x530.h b/include/configs/x530.h index 290e13de007..9081f416605 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -83,8 +83,6 @@ */ #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ -#define CONFIG_SYS_ALT_MEMTEST - /* Keep device tree and initrd in low memory so the kernel can access them */ #define CONFIG_EXTRA_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ diff --git a/include/configs/x600.h b/include/configs/x600.h index 8b6caae7be7..0dd57227948 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -92,8 +92,6 @@ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_SYS_MEMTEST_START 0x00800000 -#define CONFIG_SYS_MEMTEST_END 0x04000000 #define CONFIG_SYS_MALLOC_LEN (8 << 20) #define CONFIG_SYS_LOAD_ADDR 0x00800000 diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 329b270467e..016b797a534 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -61,8 +61,6 @@ */ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MEMTEST_START 0x00100000 -#define CONFIG_SYS_MEMTEST_END 0x01000000 #define CONFIG_SYS_LOAD_ADDR 0x20000000 /*----------------------------------------------------------------------- diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index 0c259a181f1..da640d6f14d 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -18,10 +18,6 @@ #define GICD_BASE 0xF9000000 #define GICR_BASE 0xF9080000 -#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 - -#define CONFIG_SYS_MEMTEST_START 0 -#define CONFIG_SYS_MEMTEST_END 1000 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index ee305e0226b..ae7eca11553 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_VERSAL_MINI_H #define __CONFIG_VERSAL_MINI_H -#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 #define CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index eddc2b40200..b744a91fa60 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -19,13 +19,6 @@ #define GICD_BASE 0xF9010000 #define GICC_BASE 0xF9020000 -#ifndef CONFIG_SYS_MEMTEST_SCRATCH -# define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 -#endif - -#define CONFIG_SYS_MEMTEST_START 0 -#define CONFIG_SYS_MEMTEST_END 1000 - #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index a6922896e0e..3078b9c55b5 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_ZYNQMP_MINI_H #define __CONFIG_ZYNQMP_MINI_H -#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 #define CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h index 155d7fe883f..c6cf82e2445 100644 --- a/include/configs/xilinx_zynqmp_r5.h +++ b/include/configs/xilinx_zynqmp_r5.h @@ -37,9 +37,4 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -/* 0x0 - 0x40 is used for placing exception vectors */ -#define CONFIG_SYS_MEMTEST_START 0x40 -#define CONFIG_SYS_MEMTEST_END 0x100 -#define CONFIG_SYS_MEMTEST_SCRATCH 0 - #endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index 634ee424099..6c9991fa039 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -76,8 +76,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY |\ CONFIG_SYS_POST_I2C) /* The XPedite5170 can host an XMC which has an EEPROM at address 0x50 */ diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index 0186aaa1027..c9bd369029d 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -52,8 +52,6 @@ /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ CONFIG_SYS_POST_I2C) #define I2C_ADDR_LIST {CONFIG_SYS_I2C_MAX1237_ADDR, \ diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index 5e027bebcab..6d847cb7939 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -67,8 +67,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ CONFIG_SYS_POST_I2C) /* The XPedite5370 can host an XMC which has an EEPROM at address 0x50 */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 611089cbb93..106269bae08 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -66,8 +66,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * Diagnostics */ -#define CONFIG_SYS_MEMTEST_START 0x10000000 -#define CONFIG_SYS_MEMTEST_END 0x20000000 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \ CONFIG_SYS_POST_I2C) #define I2C_ADDR_LIST {CONFIG_SYS_I2C_EEPROM_ADDR, \ diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 1bc46f6fb28..ba7fc84bf2f 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -31,8 +31,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 /* Miscellaneous configurable options */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 8b73900130d..516a6089f6d 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -71,8 +71,6 @@ #define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10) /* Memory test is destructive so default must not overlap vectors or U-Boot*/ -#define CONFIG_SYS_MEMTEST_START MEMADDR(0x01000000) -#define CONFIG_SYS_MEMTEST_END MEMADDR(0x02000000) /* Load address for stand-alone applications. * MEMADDR cannot be used here, because the definition needs to be diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index a8c6f0be10d..e76c5cbe6b8 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -91,9 +91,6 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) -#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) - /* * Size of malloc() pool diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index a93172b02cd..9e83e177752 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -219,9 +219,6 @@ #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ -#define CONFIG_SYS_MEMTEST_START 0 -#define CONFIG_SYS_MEMTEST_END 0x1000 - #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ diff --git a/include/crypto/pkcs7_parser.h b/include/crypto/pkcs7_parser.h new file mode 100644 index 00000000000..b8234da45a6 --- /dev/null +++ b/include/crypto/pkcs7_parser.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* PKCS#7 crypto data parser internal definitions + * + * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + */ + +#ifndef _PKCS7_PARSER_H +#define _PKCS7_PARSER_H + +#include <linux/oid_registry.h> +#include <crypto/pkcs7.h> +#include "x509_parser.h" + +#define kenter(FMT, ...) \ + pr_devel("==> %s("FMT")\n", __func__, ##__VA_ARGS__) +#define kleave(FMT, ...) \ + pr_devel("<== %s()"FMT"\n", __func__, ##__VA_ARGS__) + +struct pkcs7_signed_info { + struct pkcs7_signed_info *next; + struct x509_certificate *signer; /* Signing certificate (in msg->certs) */ + unsigned index; + bool unsupported_crypto; /* T if not usable due to missing crypto */ + bool blacklisted; + + /* Message digest - the digest of the Content Data (or NULL) */ + const void *msgdigest; + unsigned msgdigest_len; + + /* Authenticated Attribute data (or NULL) */ + unsigned authattrs_len; + const void *authattrs; + unsigned long aa_set; +#define sinfo_has_content_type 0 +#define sinfo_has_signing_time 1 +#define sinfo_has_message_digest 2 +#define sinfo_has_smime_caps 3 +#define sinfo_has_ms_opus_info 4 +#define sinfo_has_ms_statement_type 5 + time64_t signing_time; + + /* Message signature. + * + * This contains the generated digest of _either_ the Content Data or + * the Authenticated Attributes [RFC2315 9.3]. If the latter, one of + * the attributes contains the digest of the the Content Data within + * it. + * + * THis also contains the issuing cert serial number and issuer's name + * [PKCS#7 or CMS ver 1] or issuing cert's SKID [CMS ver 3]. + */ + struct public_key_signature *sig; +}; + +struct pkcs7_message { + struct x509_certificate *certs; /* Certificate list */ + struct x509_certificate *crl; /* Revocation list */ + struct pkcs7_signed_info *signed_infos; + u8 version; /* Version of cert (1 -> PKCS#7 or CMS; 3 -> CMS) */ + bool have_authattrs; /* T if have authattrs */ + + /* Content Data (or NULL) */ + enum OID data_type; /* Type of Data */ + size_t data_len; /* Length of Data */ + size_t data_hdrlen; /* Length of Data ASN.1 header */ + const void *data; /* Content Data (or 0) */ +}; +#endif /* _PKCS7_PARSER_H */ diff --git a/include/crypto/x509_parser.h b/include/crypto/x509_parser.h new file mode 100644 index 00000000000..4cbdc1d6612 --- /dev/null +++ b/include/crypto/x509_parser.h @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* X.509 certificate parser internal definitions + * + * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + */ + +#ifndef _X509_PARSER_H +#define _X509_PARSER_H + +#include <linux/time.h> +#include <crypto/public_key.h> +#include <keys/asymmetric-type.h> + +struct x509_certificate { + struct x509_certificate *next; + struct x509_certificate *signer; /* Certificate that signed this one */ + struct public_key *pub; /* Public key details */ + struct public_key_signature *sig; /* Signature parameters */ + char *issuer; /* Name of certificate issuer */ + char *subject; /* Name of certificate subject */ + struct asymmetric_key_id *id; /* Issuer + Serial number */ + struct asymmetric_key_id *skid; /* Subject + subjectKeyId (optional) */ + time64_t valid_from; + time64_t valid_to; + const void *tbs; /* Signed data */ + unsigned tbs_size; /* Size of signed data */ + unsigned raw_sig_size; /* Size of sigature */ + const void *raw_sig; /* Signature data */ + const void *raw_serial; /* Raw serial number in ASN.1 */ + unsigned raw_serial_size; + unsigned raw_issuer_size; + const void *raw_issuer; /* Raw issuer name in ASN.1 */ + const void *raw_subject; /* Raw subject name in ASN.1 */ + unsigned raw_subject_size; + unsigned raw_skid_size; + const void *raw_skid; /* Raw subjectKeyId in ASN.1 */ + unsigned index; + bool seen; /* Infinite recursion prevention */ + bool verified; + bool self_signed; /* T if self-signed (check unsupported_sig too) */ + bool unsupported_key; /* T if key uses unsupported crypto */ + bool unsupported_sig; /* T if signature uses unsupported crypto */ + bool blacklisted; +}; + +/* + * x509_cert_parser.c + */ +extern void x509_free_certificate(struct x509_certificate *cert); +extern struct x509_certificate *x509_cert_parse(const void *data, size_t datalen); +extern int x509_decode_time(time64_t *_t, size_t hdrlen, + unsigned char tag, + const unsigned char *value, size_t vlen); + +/* + * x509_public_key.c + */ +extern int x509_get_sig_params(struct x509_certificate *cert); +extern int x509_check_for_self_signed(struct x509_certificate *cert); +#endif /* _X509_PARSER_H */ diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 618fc10390e..a0d3df77868 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -880,6 +880,14 @@ ofnode ofnode_by_prop_value(ofnode from, const char *propname, node = ofnode_next_subnode(node)) /** + * ofnode_get_child_count() - get the child count of a ofnode + * + * @node: valid node to get its child count + * @return the number of subnodes + */ +int ofnode_get_child_count(ofnode parent); + +/** * ofnode_translate_address() - Translate a device-tree address * * Translate an address from the device-tree into a CPU physical address. This diff --git a/include/dm/read.h b/include/dm/read.h index 03c15b85506..b952551d555 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -669,6 +669,14 @@ u64 dev_translate_dma_address(const struct udevice *dev, */ int dev_read_alias_highest_id(const char *stem); +/** + * dev_get_child_count() - get the child count of a device + * + * @dev: device to use for interation (struct udevice *) + * @return the count of child subnode + */ +int dev_get_child_count(const struct udevice *dev); + #else /* CONFIG_DM_DEV_READ_INLINE is enabled */ static inline int dev_read_u32(const struct udevice *dev, @@ -978,6 +986,11 @@ static inline int dev_read_alias_highest_id(const char *stem) return fdtdec_get_alias_highest_id(gd->fdt_blob, stem); } +static inline int dev_get_child_count(const struct udevice *dev) +{ + return ofnode_get_child_count(dev_ofnode(dev)); +} + #endif /* CONFIG_DM_DEV_READ_INLINE */ /** diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h index cde61ed8830..555b4ff660a 100644 --- a/include/dt-bindings/clock/rk3328-cru.h +++ b/include/dt-bindings/clock/rk3328-cru.h @@ -1,6 +1,7 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * Copyright (c) 2016 Rockchip Electronics Co. Ltd. + * Author: Elaine <zhangqing@rock-chips.com> */ #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H @@ -90,119 +91,118 @@ #define SCLK_MAC2IO_EXT 102 /* dclk gates */ -#define DCLK_LCDC 180 -#define DCLK_HDMIPHY 181 -#define HDMIPHY 182 -#define USB480M 183 -#define DCLK_LCDC_SRC 184 +#define DCLK_LCDC 120 +#define DCLK_HDMIPHY 121 +#define HDMIPHY 122 +#define USB480M 123 +#define DCLK_LCDC_SRC 124 /* aclk gates */ -#define ACLK_AXISRAM 190 -#define ACLK_VOP_PRE 191 -#define ACLK_USB3OTG 192 -#define ACLK_RGA_PRE 193 -#define ACLK_DMAC 194 -#define ACLK_GPU 195 -#define ACLK_BUS_PRE 196 -#define ACLK_PERI_PRE 197 -#define ACLK_RKVDEC_PRE 198 -#define ACLK_RKVDEC 199 -#define ACLK_RKVENC 200 -#define ACLK_VPU_PRE 201 -#define ACLK_VIO_PRE 202 -#define ACLK_VPU 203 -#define ACLK_VIO 204 -#define ACLK_VOP 205 -#define ACLK_GMAC 206 -#define ACLK_H265 207 -#define ACLK_H264 208 -#define ACLK_MAC2PHY 209 -#define ACLK_MAC2IO 210 -#define ACLK_DCF 211 -#define ACLK_TSP 212 -#define ACLK_PERI 213 -#define ACLK_RGA 214 -#define ACLK_IEP 215 -#define ACLK_CIF 216 -#define ACLK_HDCP 217 +#define ACLK_AXISRAM 130 +#define ACLK_VOP_PRE 131 +#define ACLK_USB3OTG 132 +#define ACLK_RGA_PRE 133 +#define ACLK_DMAC 134 +#define ACLK_GPU 135 +#define ACLK_BUS_PRE 136 +#define ACLK_PERI_PRE 137 +#define ACLK_RKVDEC_PRE 138 +#define ACLK_RKVDEC 139 +#define ACLK_RKVENC 140 +#define ACLK_VPU_PRE 141 +#define ACLK_VIO_PRE 142 +#define ACLK_VPU 143 +#define ACLK_VIO 144 +#define ACLK_VOP 145 +#define ACLK_GMAC 146 +#define ACLK_H265 147 +#define ACLK_H264 148 +#define ACLK_MAC2PHY 149 +#define ACLK_MAC2IO 150 +#define ACLK_DCF 151 +#define ACLK_TSP 152 +#define ACLK_PERI 153 +#define ACLK_RGA 154 +#define ACLK_IEP 155 +#define ACLK_CIF 156 +#define ACLK_HDCP 157 /* pclk gates */ -#define PCLK_GPIO0 300 -#define PCLK_GPIO1 301 -#define PCLK_GPIO2 302 -#define PCLK_GPIO3 303 -#define PCLK_GRF 304 -#define PCLK_I2C0 305 -#define PCLK_I2C1 306 -#define PCLK_I2C2 307 -#define PCLK_I2C3 308 -#define PCLK_SPI 309 -#define PCLK_UART0 310 -#define PCLK_UART1 311 -#define PCLK_UART2 312 -#define PCLK_TSADC 313 -#define PCLK_PWM 314 -#define PCLK_TIMER 315 -#define PCLK_BUS_PRE 316 -#define PCLK_PERI_PRE 317 -#define PCLK_HDMI_CTRL 318 -#define PCLK_HDMI_PHY 319 -#define PCLK_GMAC 320 -#define PCLK_H265 321 -#define PCLK_MAC2PHY 322 -#define PCLK_MAC2IO 323 -#define PCLK_USB3PHY_OTG 324 -#define PCLK_USB3PHY_PIPE 325 -#define PCLK_USB3_GRF 326 -#define PCLK_USB2_GRF 327 -#define PCLK_HDMIPHY 328 -#define PCLK_DDR 329 -#define PCLK_PERI 330 -#define PCLK_HDMI 331 -#define PCLK_HDCP 332 -#define PCLK_DCF 333 -#define PCLK_SARADC 334 +#define PCLK_GPIO0 200 +#define PCLK_GPIO1 201 +#define PCLK_GPIO2 202 +#define PCLK_GPIO3 203 +#define PCLK_GRF 204 +#define PCLK_I2C0 205 +#define PCLK_I2C1 206 +#define PCLK_I2C2 207 +#define PCLK_I2C3 208 +#define PCLK_SPI 209 +#define PCLK_UART0 210 +#define PCLK_UART1 211 +#define PCLK_UART2 212 +#define PCLK_TSADC 213 +#define PCLK_PWM 214 +#define PCLK_TIMER 215 +#define PCLK_BUS_PRE 216 +#define PCLK_PERI_PRE 217 +#define PCLK_HDMI_CTRL 218 +#define PCLK_HDMI_PHY 219 +#define PCLK_GMAC 220 +#define PCLK_H265 221 +#define PCLK_MAC2PHY 222 +#define PCLK_MAC2IO 223 +#define PCLK_USB3PHY_OTG 224 +#define PCLK_USB3PHY_PIPE 225 +#define PCLK_USB3_GRF 226 +#define PCLK_USB2_GRF 227 +#define PCLK_HDMIPHY 228 +#define PCLK_DDR 229 +#define PCLK_PERI 230 +#define PCLK_HDMI 231 +#define PCLK_HDCP 232 +#define PCLK_DCF 233 +#define PCLK_SARADC 234 +#define PCLK_ACODECPHY 235 +#define PCLK_WDT 236 /* hclk gates */ -#define HCLK_PERI 408 -#define HCLK_TSP 409 -#define HCLK_GMAC 410 -#define HCLK_I2S0_8CH 411 -#define HCLK_I2S1_8CH 413 -#define HCLK_I2S2_2CH 413 -#define HCLK_SPDIF_8CH 414 -#define HCLK_VOP 415 -#define HCLK_NANDC 416 -#define HCLK_SDMMC 417 -#define HCLK_SDIO 418 -#define HCLK_EMMC 419 -#define HCLK_SDMMC_EXT 420 -#define HCLK_RKVDEC_PRE 421 -#define HCLK_RKVDEC 422 -#define HCLK_RKVENC 423 -#define HCLK_VPU_PRE 424 -#define HCLK_VIO_PRE 425 -#define HCLK_VPU 426 -#define HCLK_VIO 427 -#define HCLK_BUS_PRE 428 -#define HCLK_PERI_PRE 429 -#define HCLK_H264 430 -#define HCLK_CIF 431 -#define HCLK_OTG_PMU 432 -#define HCLK_OTG 433 -#define HCLK_HOST0 434 -#define HCLK_HOST0_ARB 435 -#define HCLK_CRYPTO_MST 436 -#define HCLK_CRYPTO_SLV 437 -#define HCLK_PDM 438 -#define HCLK_IEP 439 -#define HCLK_RGA 440 -#define HCLK_HDCP 441 +#define HCLK_PERI 308 +#define HCLK_TSP 309 +#define HCLK_GMAC 310 +#define HCLK_I2S0_8CH 311 +#define HCLK_I2S1_8CH 312 +#define HCLK_I2S2_2CH 313 +#define HCLK_SPDIF_8CH 314 +#define HCLK_VOP 315 +#define HCLK_NANDC 316 +#define HCLK_SDMMC 317 +#define HCLK_SDIO 318 +#define HCLK_EMMC 319 +#define HCLK_SDMMC_EXT 320 +#define HCLK_RKVDEC_PRE 321 +#define HCLK_RKVDEC 322 +#define HCLK_RKVENC 323 +#define HCLK_VPU_PRE 324 +#define HCLK_VIO_PRE 325 +#define HCLK_VPU 326 +#define HCLK_BUS_PRE 328 +#define HCLK_PERI_PRE 329 +#define HCLK_H264 330 +#define HCLK_CIF 331 +#define HCLK_OTG_PMU 332 +#define HCLK_OTG 333 +#define HCLK_HOST0 334 +#define HCLK_HOST0_ARB 335 +#define HCLK_CRYPTO_MST 336 +#define HCLK_CRYPTO_SLV 337 +#define HCLK_PDM 338 +#define HCLK_IEP 339 +#define HCLK_RGA 340 +#define HCLK_HDCP 341 #define CLK_NR_CLKS (HCLK_HDCP + 1) -#define CLKGRF_NR_CLKS (SCLK_MAC2PHY + 1) - /* soft-reset indices */ #define SRST_CORE0_PO 0 #define SRST_CORE1_PO 1 diff --git a/include/dt-bindings/net/qca-ar803x.h b/include/dt-bindings/net/qca-ar803x.h new file mode 100644 index 00000000000..9c046c7242e --- /dev/null +++ b/include/dt-bindings/net/qca-ar803x.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Device Tree constants for the Qualcomm Atheros AR803x PHYs + */ + +#ifndef _DT_BINDINGS_QCA_AR803X_H +#define _DT_BINDINGS_QCA_AR803X_H + +#define AR803X_STRENGTH_FULL 0 +#define AR803X_STRENGTH_HALF 1 +#define AR803X_STRENGTH_QUARTER 2 + +#endif diff --git a/include/dt-bindings/power/rk3328-power.h b/include/dt-bindings/power/rk3328-power.h new file mode 100644 index 00000000000..02e3d7fc1cc --- /dev/null +++ b/include/dt-bindings/power/rk3328-power.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__ +#define __DT_BINDINGS_POWER_RK3328_POWER_H__ + +/** + * RK3328 idle id Summary. + */ +#define RK3328_PD_CORE 0 +#define RK3328_PD_GPU 1 +#define RK3328_PD_BUS 2 +#define RK3328_PD_MSCH 3 +#define RK3328_PD_PERI 4 +#define RK3328_PD_VIDEO 5 +#define RK3328_PD_HEVC 6 +#define RK3328_PD_SYS 7 +#define RK3328_PD_VPU 8 +#define RK3328_PD_VIO 9 + +#endif diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h index 3c9e204cf07..ce835fd1b2b 100644 --- a/include/dwc3-uboot.h +++ b/include/dwc3-uboot.h @@ -9,6 +9,7 @@ #ifndef __DWC3_UBOOT_H_ #define __DWC3_UBOOT_H_ +#include <generic-phy.h> #include <linux/usb/otg.h> #include <linux/usb/phy.h> @@ -43,17 +44,15 @@ void dwc3_uboot_handle_interrupt(int index); struct phy; #if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB) -int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys); -int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys); +int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys); +int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys); #else -static inline int dwc3_setup_phy(struct udevice *dev, struct phy **array, - int *num_phys) +static inline int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys) { return -ENOTSUPP; } -static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, - int num_phys) +static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys) { return -ENOTSUPP; } diff --git a/include/eeprom.h b/include/eeprom.h index 79118eb83de..6820844cea3 100644 --- a/include/eeprom.h +++ b/include/eeprom.h @@ -7,7 +7,7 @@ #ifndef __EEPROM_LEGACY_H #define __EEPROM_LEGACY_H -#ifdef CONFIG_CMD_EEPROM +#if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM) void eeprom_init(int bus); int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt); int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt); @@ -17,8 +17,8 @@ int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt); * some macros here so we don't have to touch every one of those uses */ #define eeprom_init(bus) -#define eeprom_read(dev_addr, offset, buffer, cnt) ((void)-ENOSYS) -#define eeprom_write(dev_addr, offset, buffer, cnt) ((void)-ENOSYS) +#define eeprom_read(dev_addr, offset, buffer, cnt) (-ENOSYS) +#define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS) #endif #if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR) diff --git a/include/efi_loader.h b/include/efi_loader.h index f92bfe57e68..0e924ad1093 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -394,6 +394,8 @@ efi_status_t efi_disk_register(void); int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc, const char *if_typename, int diskid, const char *pdevname); +/* Check if it is EFI system partition */ +bool efi_disk_is_system_part(efi_handle_t handle); /* Called by bootefi to make GOP (graphical) interface available */ efi_status_t efi_gop_register(void); /* Called by bootefi to make the network interface available */ diff --git a/include/environment/distro/sf.h b/include/environment/distro/sf.h new file mode 100644 index 00000000000..e793be06c6f --- /dev/null +++ b/include/environment/distro/sf.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2020 Amarula Solutions(India) + * + * SF distro configurations. + */ + +#ifndef __DISTRO_SF_CONFIG_H +#define __DISTRO_SF_CONFIG_H + +#if CONFIG_IS_ENABLED(CMD_SF) +#define BOOTENV_SHARED_SF(devtypel) \ + #devtypel "_boot=" \ + "if " #devtypel " probe ${busnum}; then " \ + "devtype=" #devtypel "; " \ + "run scan_sf_for_scripts; " \ + "fi\0" +#define BOOTENV_DEV_SF(devtypeu, devtypel, instance) \ + "bootcmd_" #devtypel #instance "=" \ + "busnum=" #instance "; " \ + "run " #devtypel "_boot\0" +#define BOOTENV_DEV_NAME_SF(devtypeu, devtypel, instance) \ + #devtypel #instance " " +#else +#define BOOTENV_SHARED_SF(devtypel) +#define BOOTENV_DEV_SF \ + BOOT_TARGET_DEVICES_references_SF_without_CONFIG_CMD_SF +#define BOOTENV_DEV_NAME_SF \ + BOOT_TARGET_DEVICES_references_SF_without_CONFIG_CMD_SF + +#endif /* CONFIG_CMD_SF */ + +#define BOOTENV_SF \ + BOOTENV_SHARED_SF(sf) \ + "scan_sf_for_scripts=" \ + "${devtype} read ${scriptaddr} " \ + "${script_offset_f} ${script_size_f}; " \ + "source ${scriptaddr}; " \ + "echo SCRIPT FAILED: continuing...\0" + +#endif /* __DISTRO_SF_CONFIG_H */ diff --git a/include/fsl_qe.h b/include/fsl_qe.h index d4eba824365..6e44cbdb562 100644 --- a/include/fsl_qe.h +++ b/include/fsl_qe.h @@ -227,7 +227,8 @@ typedef enum qe_clock { /* Structure that defines QE firmware binary files. * - * See doc/README.qe_firmware for a description of these fields. + * See Documentation/powerpc/qe_firmware.rst in the Linux kernel tree for + * a description of these fields. */ struct qe_firmware { struct qe_header { diff --git a/include/generic-phy.h b/include/generic-phy.h index 73537025c2c..55629ae0b41 100644 --- a/include/generic-phy.h +++ b/include/generic-phy.h @@ -124,6 +124,23 @@ struct phy_ops { int (*power_off)(struct phy *phy); }; +/** + * struct phy_bulk - A handle to (allowing control of) a bulk of phys. + * + * Consumers provide storage for the phy bulk. The content of the structure is + * managed solely by the phy API. A phy bulk struct is initialized + * by "get"ing the phy bulk struct. + * The phy bulk struct is passed to all other bulk phy APIs to apply + * the API to all the phy in the bulk struct. + * + * @phys: An array of phy handles. + * @count: The number of phy handles in the phys array. + */ +struct phy_bulk { + struct phy *phys; + unsigned int count; +}; + #ifdef CONFIG_PHY /** @@ -250,6 +267,55 @@ int generic_phy_get_by_node(ofnode node, int index, struct phy *phy); int generic_phy_get_by_name(struct udevice *user, const char *phy_name, struct phy *phy); +/** + * generic_phy_get_bulk - Get all phys of a device. + * + * This looks up and gets all phys of the consumer device; each device is + * assumed to have n phys associated with it somehow, and this function finds + * and gets all of them in a separate structure. + * + * @dev: The consumer device. + * @bulk A pointer to a phy bulk struct to initialize. + * @return 0 if OK, or a negative error code. + */ +int generic_phy_get_bulk(struct udevice *dev, struct phy_bulk *bulk); + +/** + * generic_phy_init_bulk() - Initialize all phys in a phy bulk struct. + * + * @bulk: A phy bulk struct that was previously successfully requested + * by generic_phy_get_bulk(). + * @return 0 if OK, or negative error code. + */ +int generic_phy_init_bulk(struct phy_bulk *bulk); + +/** + * generic_phy_exit_bulk() - de-initialize all phys in a phy bulk struct. + * + * @bulk: A phy bulk struct that was previously successfully requested + * by generic_phy_get_bulk(). + * @return 0 if OK, or negative error code. + */ +int generic_phy_exit_bulk(struct phy_bulk *bulk); + +/** + * generic_phy_power_on_bulk() - Power on all phys in a phy bulk struct. + * + * @bulk: A phy bulk struct that was previously successfully requested + * by generic_phy_get_bulk(). + * @return 0 if OK, or negative error code. + */ +int generic_phy_power_on_bulk(struct phy_bulk *bulk); + +/** + * generic_phy_power_off_bulk() - Power off all phys in a phy bulk struct. + * + * @bulk: A phy bulk struct that was previously successfully requested + * by generic_phy_get_bulk(). + * @return 0 if OK, or negative error code. + */ +int generic_phy_power_off_bulk(struct phy_bulk *bulk); + #else /* CONFIG_PHY */ static inline int generic_phy_init(struct phy *phy) @@ -289,6 +355,32 @@ static inline int generic_phy_get_by_name(struct udevice *user, const char *phy_ return 0; } +static inline int +generic_phy_get_bulk(struct udevice *dev, struct phy_bulk *bulk) +{ + return 0; +} + +static inline int generic_phy_init_bulk(struct phy_bulk *bulk) +{ + return 0; +} + +static inline int generic_phy_exit_bulk(struct phy_bulk *bulk) +{ + return 0; +} + +static inline int generic_phy_power_on_bulk(struct phy_bulk *bulk) +{ + return 0; +} + +static inline int generic_phy_power_off_bulk(struct phy_bulk *bulk) +{ + return 0; +} + #endif /* CONFIG_PHY */ /** diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ec144a08d8f..233fdc341a7 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -22,6 +22,7 @@ #define SNOR_MFR_INTEL CFI_MFR_INTEL #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */ #define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron */ +#define SNOR_MFR_ISSI CFI_MFR_PMC #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX #define SNOR_MFR_SPANSION CFI_MFR_AMD #define SNOR_MFR_SST CFI_MFR_SST diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h index be01e1e82e5..83eafb184e6 100644 --- a/include/linux/mtd/spinand.h +++ b/include/linux/mtd/spinand.h @@ -204,6 +204,7 @@ struct spinand_manufacturer { extern const struct spinand_manufacturer gigadevice_spinand_manufacturer; extern const struct spinand_manufacturer macronix_spinand_manufacturer; extern const struct spinand_manufacturer micron_spinand_manufacturer; +extern const struct spinand_manufacturer toshiba_spinand_manufacturer; extern const struct spinand_manufacturer winbond_spinand_manufacturer; /** diff --git a/include/menu.h b/include/menu.h index 2d227c20bd5..9ab9b21ebb9 100644 --- a/include/menu.h +++ b/include/menu.h @@ -9,6 +9,7 @@ struct menu; struct menu *menu_create(char *title, int timeout, int prompt, + void (*display_statusline)(struct menu *), void (*item_data_print)(void *), char *(*item_choice)(void *), void *item_choice_data); @@ -16,7 +17,6 @@ int menu_default_set(struct menu *m, char *item_key); int menu_get_choice(struct menu *m, void **choice); int menu_item_add(struct menu *m, char *item_key, void *item_data); int menu_destroy(struct menu *m); -void menu_display_statusline(struct menu *m); int menu_default_choice(struct menu *m, void **choice); /** diff --git a/include/netdev.h b/include/netdev.h index 68a3fceab66..f2d21c45d0f 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -125,6 +125,7 @@ int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, /* * Allow FEC to fine-tune MII configuration on boards which require this. */ +struct eth_device; int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); #endif diff --git a/include/spi-mem.h b/include/spi-mem.h index 36814efa861..893f7bd7337 100644 --- a/include/spi-mem.h +++ b/include/spi-mem.h @@ -60,10 +60,12 @@ /** * enum spi_mem_data_dir - describes the direction of a SPI memory data * transfer from the controller perspective + * @SPI_MEM_NO_DATA: no data transferred * @SPI_MEM_DATA_IN: data coming from the SPI memory * @SPI_MEM_DATA_OUT: data sent the SPI memory */ enum spi_mem_data_dir { + SPI_MEM_NO_DATA, SPI_MEM_DATA_IN, SPI_MEM_DATA_OUT, }; diff --git a/include/test/test.h b/include/test/test.h index 2a752110083..029288de880 100644 --- a/include/test/test.h +++ b/include/test/test.h @@ -41,7 +41,29 @@ struct unit_test { int flags; }; -/* Declare a new unit test */ +/** + * UNIT_TEST() - create linker generated list entry for unit a unit test + * + * The macro UNIT_TEST() is used to create a linker generated list entry. These + * list entries are enumerate tests that can be execute using the ut command. + * The list entries are used both by the implementation of the ut command as + * well as in a related Python test. + * + * For Python testing the subtests are collected in Python function + * generate_ut_subtest() by applying a regular expression to the lines of file + * u-boot.sym. The list entries have to follow strict naming conventions to be + * matched by the expression. + * + * Use UNIT_TEST(foo_test_bar, _flags, foo_test) for a test bar in test suite + * foo that can be executed via command 'ut foo bar' and is implemented in + * function foo_test_bar(). + * + * @_name: concatenation of name of the test suite, "_test_", and the name + * of the test + * @_flags: an integer field that can be evaluated by the test suite + * implementation + * @_suite: name of the test suite concatenated with "_test" + */ #define UNIT_TEST(_name, _flags, _suite) \ ll_entry_declare(struct unit_test, _name, _suite) = { \ .file = __FILE__, \ diff --git a/include/usb/xhci.h b/include/usb/xhci.h index 60175044884..20e4a21066f 100644 --- a/include/usb/xhci.h +++ b/include/usb/xhci.h @@ -670,6 +670,9 @@ struct xhci_ep_ctx { /* deq bitmasks */ #define EP_CTX_CYCLE_MASK (1 << 0) +/* reserved[0] bitmasks, MediaTek xHCI used */ +#define EP_BPKTS(p) (((p) & 0x7f) << 0) +#define EP_BBM(p) (((p) & 0x1) << 11) /** * struct xhci_input_control_context |