Revert "sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memory"

This reverts commit f76eba38b3eda905ff3bdc18dd1240d3dcbc6e5a.

This patch did not have a full and proper copyright/S-o-b chain.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>

Conflicts:
	include/configs/sun6i.h
	include/configs/sun8i.h

6 files changed, 0 insertions, 30 deletions

diff --git a/include/configs/sun4i.h b/include/configs/sun4i.h
index a3c94085182..ea079eb5f78 100644
--- a/include/configs/sun4i.h
+++ b/include/configs/sun4i.h
@@ -18,7 +18,6 @@
 #endif
 
 #define CONFIG_SUNXI_USB_PHYS	3
-#define CONFIG_NAND_SUNXI_GPC_PORTS	{16, 17, 18, 19, 20, 21, 22, 24}
 
 /*
  * Include common sunxi configuration where most the settings are
diff --git a/include/configs/sun5i.h b/include/configs/sun5i.h
index 8e13df58bd5..d2576599036 100644
--- a/include/configs/sun5i.h
+++ b/include/configs/sun5i.h
@@ -19,9 +19,6 @@
 
 #define CONFIG_SUNXI_USB_PHYS	2
 
-/* \todo A13 only defines port 19, whereas A10s requires each of these */
-#define CONFIG_NAND_SUNXI_GPC_PORTS	{16, 17, 18, 19}
-
 /*
  * Include common sunxi configuration where most the settings are
  */
diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h
index a0ebc7e9770..93863b59bc5 100644
--- a/include/configs/sun6i.h
+++ b/include/configs/sun6i.h
@@ -27,8 +27,6 @@
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_TIMER_CLK_FREQ		24000000
 
-#define CONFIG_NAND_SUNXI_GPC_PORTS	{24, 25, 26}
-
 /*
  * Include common sunxi configuration where most the settings are
  */
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index 3d26ce8d4a4..56101a9ffcd 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -24,8 +24,6 @@
 #define CONFIG_ARMV7_SECURE_BASE	SUNXI_SRAM_B_BASE
 #define CONFIG_TIMER_CLK_FREQ		24000000
 
-#define CONFIG_NAND_SUNXI_GPC_PORTS	{16, 17, 18, 19, 20, 21, 22, 24}
-
 /*
  * Include common sunxi configuration where most the settings are
  */
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
index fe8c511448b..4fc63650082 100644
--- a/include/configs/sun8i.h
+++ b/include/configs/sun8i.h
@@ -23,10 +23,8 @@
 #define CONFIG_ARMV7_PSCI		1
 #if defined(CONFIG_MACH_SUN8I_A23)
 #define CONFIG_ARMV7_PSCI_NR_CPUS	2
-#define CONFIG_NAND_SUNXI_GPC_PORTS	{16, 17, 18}
 #elif defined(CONFIG_MACH_SUN8I_A33)
 #define CONFIG_ARMV7_PSCI_NR_CPUS	4
-#define CONFIG_NAND_SUNXI_GPC_PORTS	{16}
 #else
 #error Unsupported sun8i variant
 #endif
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index aed040b0eb3..9576bc1a20c 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -146,10 +146,8 @@
 #define CONFIG_CMD_MMC
 #define CONFIG_MMC_SUNXI
 #define CONFIG_MMC_SUNXI_SLOT		0
-#if !defined(CONFIG_SPL_NAND_SUPPORT)
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
-#endif /* CONFIG_SPL_NAND_SUPPORT */
 #endif
 
 /* 4MB of malloc() pool */
@@ -351,24 +349,6 @@ extern int soft_i2c_gpio_scl;
 #define CONFIG_ENV_IS_NOWHERE
 #endif
 
-#ifdef CONFIG_SPL_NAND_SUPPORT
-#define CONFIG_NAND
-#define CONFIG_SYS_NAND_SELF_INIT
-#define CONFIG_NAND_SUNXI
-#define CONFIG_CMD_SPL_WRITE_SIZE		0x000400
-#define CONFIG_SYS_NAND_U_BOOT_OFFS		0x008000
-
-/* \todo Make these parameterisable in kernel config ? */
-#define CONFIG_NAND_SUNXI_PAGE_SIZE		8192
-#define CONFIG_NAND_SUNXI_ECC_STEP		1024
-#define CONFIG_NAND_SUNXI_ECC_STRENGTH		40
-#define CONFIG_NAND_SUNXI_ADDR_CYCLES		5
-
-#ifndef CONFIG_NAND_SUNXI_GPC_PORTS
-#error "No NAND GPC ports defined, NAND unsupported"
-#endif
-#endif /* CONFIG_SPL_NAND_SUPPORT */
-
 #define CONFIG_MISC_INIT_R
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV