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authorWeijie Gao2022-05-20 11:22:41 +0800
committerDaniel Schwierzeck2022-07-13 23:03:37 +0200
commitdaf4ce6b5e84265fa0e6da442ba3a7f6ec25ae94 (patch)
tree72dda84e833d208ab257455d281d64cdad05a884 /include
parente75cc00982f6fa035a476ab90bd5ddd66ff23622 (diff)
reset: mtmips: add reset controller support for MediaTek MT7621 SoC
This patch adds reset controller bits definition header file for MediaTek MT7621 SoC Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/reset/mt7621-reset.h38
1 files changed, 38 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/mt7621-reset.h b/include/dt-bindings/reset/mt7621-reset.h
new file mode 100644
index 00000000000..8e4341f0407
--- /dev/null
+++ b/include/dt-bindings/reset/mt7621-reset.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2022 MediaTek Inc. All rights reserved.
+ *
+ * Author: Weijie Gao <weijie.gao@mediatek.com>
+ */
+
+#ifndef _DT_BINDINGS_MT7621_RESET_H_
+#define _DT_BINDINGS_MT7621_RESET_H_
+
+#define RST_PPE 31
+#define RST_SDXC 30
+#define RST_CRYPTO 29
+#define RST_AUX_STCK 28
+#define RST_PCIE2 26
+#define RST_PCIE1 25
+#define RST_PCIE0 24
+#define RST_GMAC 23
+#define RST_UART3 21
+#define RST_UART2 20
+#define RST_UART1 19
+#define RST_SPI 18
+#define RST_I2S 17
+#define RST_I2C 16
+#define RST_NFI 15
+#define RST_GDMA 14
+#define RST_PIO 13
+#define RST_PCM 11
+#define RST_MC 10
+#define RST_INTC 9
+#define RST_TIMER 8
+#define RST_SPDIFTX 7
+#define RST_FE 6
+#define RST_HSDMA 5
+#define RST_MCM 2
+#define RST_SYS 0
+
+#endif /* _DT_BINDINGS_MT7621_RESET_H_ */