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authorJagan Teki2023-01-30 20:27:45 +0530
committerKever Yang2023-02-28 18:07:28 +0800
commitf5bc9929a26364ef85e46f372a9b3a01ccbb8742 (patch)
treee1c48871b8c91661c4408313d1886160c51070d4 /include
parent5457e152726a9172670d412950e92881b2a3c9f6 (diff)
arm: rockchip: Add RK3588 arch core support
The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76 and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU, Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2, LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C, USB 2.0, PCIe 3.0, SATA 3, Ethernet, SDIO3.0 I2C, UART, SPI, GPIO and PWM. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/rk3588_common.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/include/configs/rk3588_common.h b/include/configs/rk3588_common.h
new file mode 100644
index 00000000000..abd20139aaf
--- /dev/null
+++ b/include/configs/rk3588_common.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#ifndef __CONFIG_RK3588_COMMON_H
+#define __CONFIG_RK3588_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CFG_IRAM_BASE 0xff000000
+
+#define CFG_SYS_SDRAM_BASE 0
+#define SDRAM_MAX_SIZE 0xf0000000
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+ "scriptaddr=0x00c00000\0" \
+ "pxefile_addr_r=0x00e00000\0" \
+ "fdt_addr_r=0x0a100000\0" \
+ "kernel_addr_r=0x02080000\0" \
+ "ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+#define CFG_EXTRA_ENV_SETTINGS \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "partitions=" PARTS_DEFAULT \
+ ENV_MEM_LAYOUT_SETTINGS \
+ ROCKCHIP_DEVICE_SETTINGS \
+ BOOTENV
+
+#endif /* __CONFIG_RK3588_COMMON_H */