Patch by Anders Larsen, 09 Jan 2004:

ARM memory layout fixes: the abort-stack is now set up in the
correct RAM area, and the BSS is zeroed out as it should be.

Furthermore, the magic variables 'armboot_end' and 'armboot_end_data'
of the linker scripts are replaced by '__bss_start' and '_end',
resp., which is a further step to eliminate unnecessary differences
between the implementation of the CPU architectures.

6 files changed, 7 insertions, 8 deletions

diff --git a/include/asm-arm/u-boot-arm.h b/include/asm-arm/u-boot-arm.h
index d5dbd6d1bae..41e7a8f7d3f 100644
--- a/include/asm-arm/u-boot-arm.h
+++ b/include/asm-arm/u-boot-arm.h
@@ -31,8 +31,8 @@
 
 /* for the following variables, see start.S */
 extern ulong _armboot_start;	/* code start */
-extern ulong _armboot_end_data;	/* code + data end */
-extern ulong _armboot_end;	/* BSS end */
+extern ulong _bss_start;	/* code + data end == BSS start */
+extern ulong _bss_end;		/* BSS end */
 extern ulong IRQ_STACK_START;	/* top of IRQ stack */
 extern ulong FIQ_STACK_START;	/* top of FIQ stack */
 
diff --git a/include/bmp_logo.h b/include/bmp_logo.h
index 9c924b8592d..265f744d0e3 100644
--- a/include/bmp_logo.h
+++ b/include/bmp_logo.h
@@ -18,7 +18,7 @@ unsigned short bmp_logo_palette[] = {
 	0x0343,  0x0454,  0x0565,  0x0565,  0x0676,  0x0787,  0x0898,  0x0999,
 	0x0AAA,  0x0ABA,  0x0BCB,  0x0CCC,  0x0DDD,  0x0EEE,  0x0FFF,  0x0FB3,
 	0x0FB4,  0x0FC4,  0x0FC5,  0x0FC6,  0x0FD7,  0x0FD8,  0x0FD9,  0x0FDA,
-	0x0FEA,  0x0FEB,  0x0FEC,  0x0FFD,  0x0FFE,  0x0FFF,  0x0FFF,
+	0x0FEA,  0x0FEB,  0x0FEC,  0x0FFD,  0x0FFE,  0x0FFF,  0x0FFF,  
 };
 
 unsigned char bmp_logo_bitmap[] = {
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 709c0d7a993..77439e64185 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -82,9 +82,7 @@
  */
 
 /*
- * Size of malloc() pool; this lives below the uppermost 128 KiB which are
- * used for the RAM copy of the uboot code
- *
+ * Size of malloc() pool
  */
 #define CFG_MALLOC_LEN		(256*1024)
 #define CFG_GBL_DATA_SIZE	128		/* size in bytes reserved for initial data */
diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h
index 1862b06a03d..3f2026ea04f 100644
--- a/include/configs/ixdp425.h
+++ b/include/configs/ixdp425.h
@@ -49,6 +49,7 @@
  * Size of malloc() pool
  */
 #define CFG_MALLOC_LEN      (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/trab.h b/include/configs/trab.h
index e9ba90f2aac..5e0b14f3532 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -399,7 +399,7 @@
 #define CFG_ENV_SIZE		0x4000
 #define CFG_ENV_SECT_SIZE	0x20000
 #else
-#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x4000)
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x8000)
 #define CFG_ENV_SIZE		0x4000
 #define CFG_ENV_SECT_SIZE	0x4000
 #endif
diff --git a/include/flash.h b/include/flash.h
index a0c9cadc28a..8f20887e4b9 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -215,7 +215,7 @@ extern int flash_real_protect(flash_info_t *info, long sector, int prot);
 #define INTEL_ID_28F640C3T  0x88CC88CC	/*  64M = 4M x 16 top boot sector	*/
 #define INTEL_ID_28F640C3B  0x88CD88CD	/*  64M = 4M x 16 bottom boot sector	*/
 
-#define INTEL_ID_28F128J3   0x89189818	/*  16M = 8M x 16 x 128 */
+#define INTEL_ID_28F128J3   0x89188918	/*  16M = 8M x 16 x 128 */
 #define INTEL_ID_28F320J5   0x00140014	/*  32M = 128K x  32	*/
 #define INTEL_ID_28F640J5   0x00150015	/*  64M = 128K x  64	*/
 #define INTEL_ID_28F320J3A  0x00160016	/*  32M = 128K x  32	*/