diff options
| author | Jagan Teki | 2022-12-14 23:21:05 +0530 |
|---|---|---|
| committer | Kever Yang | 2023-01-16 18:01:11 +0800 |
| commit | ffb191e458cfbd6584b62b10757f2e68072862cc (patch) | |
| tree | b027a30ae1054fc10dd8b5bd9913688457dd12ef /include | |
| parent | 2204a8c90aef05f0cbded2088dd56c10b3af70c1 (diff) | |
arm: rockchip: Add RV1126 arch core support
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/rv1126_common.h | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/include/configs/rv1126_common.h b/include/configs/rv1126_common.h new file mode 100644 index 00000000000..1ec1640f99d --- /dev/null +++ b/include/configs/rv1126_common.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. + */ + +#ifndef __CONFIG_RV1126_COMMON_H +#define __CONFIG_RV1126_COMMON_H + +#include "rockchip-common.h" + +#define CFG_SYS_HZ_CLOCK 24000000 + +#define CFG_IRAM_BASE 0xff700000 + +#define GICD_BASE 0xfeff1000 +#define GICC_BASE 0xfeff2000 + +#define CFG_SYS_SDRAM_BASE 0 +#define SDRAM_MAX_SIZE 0xfd000000 + +/* memory size > 128MB */ +#define ENV_MEM_LAYOUT_SETTINGS \ + "scriptaddr=0x00000000\0" \ + "pxefile_addr_r=0x00100000\0" \ + "fdt_addr_r=0x08300000\0" \ + "kernel_addr_r=0x02008000\0" \ + "ramdisk_addr_r=0x0a200000\0" + +#include <config_distro_bootcmd.h> +#define CFG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x0fffffff\0" \ + "initrd_high=0x0fffffff\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "partitions=" PARTS_DEFAULT \ + ENV_MEM_LAYOUT_SETTINGS \ + ROCKCHIP_DEVICE_SETTINGS \ + BOOTENV + +#endif /* __CONFIG_RV1126_COMMON_H */ |