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authorChristophe Leroy2024-04-12 18:16:59 +0200
committerChristophe Leroy2024-04-18 15:47:46 +0200
commitdff36805c7fca1edabf3a8be94a8431928e3aec8 (patch)
tree6fabad4d4417dcb90c5608d9c0a862266c49c547 /lib/crc32.c
parent244f8461eb270013fe61d17b5029d62fac67e107 (diff)
spi: mpc8xx: Use 16 bit mode for large transfers with even size
On CPM, the RISC core is a lot more efficiant when doing transfers in 16-bits chunks than in 8-bits chunks, but unfortunately the words need to be byte swapped. So, for large tranfers with an even size, allocate a temporary buffer and byte-swap data before and after transfer. This change allows setting higher speed for transfer. For instance on an MPC 8xx (CPM1 comms RISC processor), the documentation tells that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load at 25 MHz while a word transfer at the same speed uses 0.032% of CPM load. This means the speed can be 6 times higher in word mode for the same CPM load. For small transfers, the load reduction is not worth the CPU load required to allocate the temporary buffer, so do it only when data size is over 64 bytes. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Diffstat (limited to 'lib/crc32.c')
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