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authorHugo Villeneuve2023-05-25 17:02:29 -0400
committerStefano Babic2023-07-13 11:29:40 +0200
commit1b4c3e612549ea97c90301173bd56ff9f6907503 (patch)
treec7fcf7868dcb8c041b2901e6948c64debaae0269 /lib/ldiv.c
parent48d1fb92a9244d8c9b6687158034c754ef7d7971 (diff)
imx8mn-var-som: adjust PHY reset gpios according to hardware configuration
For SOM with the EC configuration, the ethernet PHY is located on the SOM itself, and connected to the CPU ethernet controller. It has a reset line controlled via GPIO1_IO9. In this configuration, the PHY located on the carrier board is not connected to anything and is therefore not used. For SOM without EC configuration, the ethernet PHY on the carrier board is connected to the CPU ethernet controller. It has a reset line controlled via the GPIO expander PCA9534_IO5. The hardware configuration (EC) is determined at runtime by reading from the SOM EEPROM. To support both hardware configurations (EC and non-EC), adjust/fix the PHY reset gpios according to the hardware configuration read at runtime from the SOM EEPROM. This adjustement is done in U-Boot (OF_BOARD_FIXUP) and kernel (OF_BOARD_SETUP) device trees. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Diffstat (limited to 'lib/ldiv.c')
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