diff options
| author | Tom Rini | 2020-01-22 13:38:00 -0500 |
|---|---|---|
| committer | Tom Rini | 2020-01-22 13:38:00 -0500 |
| commit | 052170c6a043eec4e73fad80955876cf1ba5e4f2 (patch) | |
| tree | 554a29e0a02eb6789afabcebf236c209d693f4ed /scripts | |
| parent | 75dd53055a33f5bdb8ee2f53ce76c67052dfca7e (diff) | |
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'scripts')
| -rw-r--r-- | scripts/config_whitelist.txt | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0d6dd06beae..aa809501d17 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -228,7 +228,6 @@ CONFIG_CONS_SCIF0 CONFIG_CONS_SCIF1 CONFIG_CONS_SCIF2 CONFIG_CONS_SCIF4 -CONFIG_CONTROL CONFIG_CONTROLCENTERD CONFIG_CON_ROT CONFIG_CORTINA_FW_ADDR @@ -557,7 +556,6 @@ CONFIG_FORMIKE CONFIG_FPGA_COUNT CONFIG_FPGA_DELAY CONFIG_FPGA_STRATIX_V -CONFIG_FSLDMAFEC CONFIG_FSL_CADMUS CONFIG_FSL_CORENET CONFIG_FSL_CPLD @@ -671,7 +669,6 @@ CONFIG_HAS_ETH7 CONFIG_HAS_FEC CONFIG_HAS_FSL_DR_USB CONFIG_HAS_FSL_MPH_USB -CONFIG_HAS_POST CONFIG_HCLK_FREQ CONFIG_HDBOOT CONFIG_HDMI_ENCODER_I2C_ADDR @@ -1079,7 +1076,6 @@ CONFIG_MAX_PKT CONFIG_MAX_RAM_BANK_SIZE CONFIG_MCF5249 CONFIG_MCF5253 -CONFIG_MCFFEC CONFIG_MCFRTC CONFIG_MCFTMR CONFIG_MCLK_DIS @@ -1167,7 +1163,6 @@ CONFIG_MX35_HCLK_FREQ CONFIG_MX6DL_LPDDR2 CONFIG_MX6DQ_LPDDR2 CONFIG_MX6SX_SABRESD_REVA -CONFIG_MX6UL_14X14_EVK_EMMC_REWORK CONFIG_MXC_EPDC CONFIG_MXC_GPT_HCLK CONFIG_MXC_MCI_REGS_BASE @@ -1836,7 +1831,6 @@ CONFIG_SYS_BMAN_SP_CINH_SIZE CONFIG_SYS_BMAN_SWP_ISDR_REG CONFIG_SYS_BOARD_NAME CONFIG_SYS_BOARD_OMAP3_HA -CONFIG_SYS_BOARD_VERSION CONFIG_SYS_BOOK3E_HV CONFIG_SYS_BOOTCOUNT_BE CONFIG_SYS_BOOTCOUNT_LE @@ -2293,13 +2287,7 @@ CONFIG_SYS_FDT_LOAD_ADDR CONFIG_SYS_FDT_PAD CONFIG_SYS_FDT_SIZE CONFIG_SYS_FEC0_IOBASE -CONFIG_SYS_FEC0_MIIBASE -CONFIG_SYS_FEC0_PHYADDR -CONFIG_SYS_FEC0_PINMUX CONFIG_SYS_FEC1_IOBASE -CONFIG_SYS_FEC1_MIIBASE -CONFIG_SYS_FEC1_PHYADDR -CONFIG_SYS_FEC1_PINMUX CONFIG_SYS_FECI2C CONFIG_SYS_FEC_BUF_USE_SRAM CONFIG_SYS_FEC_FULL_MII @@ -3605,8 +3593,6 @@ CONFIG_SYS_PIOC_PPUDR_VAL CONFIG_SYS_PIOD_PDR_VAL1 CONFIG_SYS_PIOD_PPUDR_VAL CONFIG_SYS_PIO_MODE -CONFIG_SYS_PIT_BASE -CONFIG_SYS_PIT_PRESCALE CONFIG_SYS_PIXIS_VBOOT_ENABLE CONFIG_SYS_PIXIS_VBOOT_MASK CONFIG_SYS_PIXIS_VCFGEN0_ENABLE |