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author | Dario Binacchi | 2023-11-11 11:46:19 +0100 |
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committer | Patrice Chotard | 2023-12-15 15:03:18 +0100 |
commit | 767ca6d6827281744641180e4ac2921f5b828893 (patch) | |
tree | 6d2885b4c07671f25aa7de80c040de8f9524674d /test/log | |
parent | bd6eb5ddd715e7441d804c67f434418e172a1423 (diff) |
clk: stm32f: fix setting of LCD clock
Set pllsaidivr only if the PLLSAIR output frequency is an exact multiple
of the pixel clock rate. Otherwise, we search through all combinations
of pllsaidivr * pllsair and use the one which gives the rate closest to
requested one.
Fixes: 5e993508cb25 ("clk: clk_stm32f: Add set_rate for LTDC clock")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'test/log')
0 files changed, 0 insertions, 0 deletions