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authorThor Thayer2019-12-06 13:47:32 -0600
committerMarek Vasut2020-01-07 14:38:34 +0100
commit8097aee3abc3b773aceea01f756a38b34b274e1e (patch)
treed1da575ae9397760133c6e47d9333540e4575dec /tools/imximage.c
parent62079b2211e113f8ee395025d1213f91e1da219e (diff)
ddr: socfpga: Enable ARM64 Non-Secure SDRAM ECC Access
The ECC registers in the SDRAM HMC Adapter should always be accessible (both when ECC is enabled and disabled). Currently, the registers are accessible only when ECC is enabled. The ECC Enabled bit is used to determine the status of ECC by later OSes so always allow access. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'tools/imximage.c')
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