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author | Rasmus Villemoes | 2022-04-25 16:22:48 +0200 |
---|---|---|
committer | Stefano Babic | 2022-05-20 09:30:28 +0200 |
commit | 290ffe57886271a6ac6b7750f70410ee51727f42 (patch) | |
tree | dcc7b56c42309a93f9251ab90b2b23ba973b25ff /tools/patman/series.py | |
parent | c329f9349bc4ab343101cdde3c0874f4ca6400bd (diff) |
imx8m: fix reading of DDR4 MR registers
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me
tmp = 0x00ffff00
tmp = 0x00070700
tmp = 0x00000000
tmp = 0x00101000
and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.
So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.
This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Diffstat (limited to 'tools/patman/series.py')
0 files changed, 0 insertions, 0 deletions