diff options
| -rw-r--r-- | arch/arm/dts/imx6qdl-sr-som.dtsi | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi b/arch/arm/dts/imx6qdl-sr-som.dtsi index b06577808ff..c20bed27219 100644 --- a/arch/arm/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/dts/imx6qdl-sr-som.dtsi @@ -55,7 +55,13 @@ pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; phy-handle = <&phy>; phy-mode = "rgmii-id"; - phy-reset-duration = <2>; + + /* + * The PHY seems to require a long-enough reset duration to avoid + * some rare issues where the PHY gets stuck in an inconsistent and + * non-functional state at boot-up. 10ms proved to be fine . + */ + phy-reset-duration = <10>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; @@ -64,8 +70,15 @@ #size-cells = <0>; phy: ethernet-phy@0 { - reg = <0>; + /* + * The PHY can appear either: + * - AR8035: at address 0 or 4 + * - ADIN1300: at address 1 + * Actual address being detected at runtime. + */ + reg = <0xffffffff>; qca,clk-out-frequency = <125000000>; + adi,phy-output-clock = "125mhz-free-running"; }; }; }; |