aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--doc/device-tree-bindings/pwm/cros-ec-pwm.txt23
-rw-r--r--drivers/misc/cros_ec.c17
-rw-r--r--drivers/pwm/Kconfig9
-rw-r--r--drivers/pwm/Makefile1
-rw-r--r--drivers/pwm/cros_ec_pwm.c84
-rw-r--r--include/cros_ec.h13
6 files changed, 147 insertions, 0 deletions
diff --git a/doc/device-tree-bindings/pwm/cros-ec-pwm.txt b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
new file mode 100644
index 00000000000..f198d088917
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
@@ -0,0 +1,23 @@
+PWM controlled by ChromeOS EC
+
+Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
+(EC) and controlled via a host-command interface.
+
+An EC PWM node should be only found as a sub-node of the EC node (see
+doc/device-tree-bindings/misc/cros-ec.txt).
+
+Required properties:
+- compatible: Must contain "google,cros-ec-pwm"
+- #pwm-cells: Should be 1. The cell specifies the PWM index.
+
+Example:
+ cros-ec@0 {
+ compatible = "google,cros-ec-spi";
+
+ ...
+
+ cros_ec_pwm: ec-pwm {
+ compatible = "google,cros-ec-pwm";
+ #pwm-cells = <1>;
+ };
+ };
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index ebfa7c41c25..7904d5cc72d 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -1170,6 +1170,23 @@ int cros_ec_battery_cutoff(struct udevice *dev, uint8_t flags)
return 0;
}
+int cros_ec_set_pwm_duty(struct udevice *dev, uint8_t index, uint16_t duty)
+{
+ struct ec_params_pwm_set_duty p;
+ int ret;
+
+ p.duty = duty;
+ p.pwm_type = EC_PWM_TYPE_GENERIC;
+ p.index = index;
+
+ ret = ec_command(dev, EC_CMD_PWM_SET_DUTY, 0, &p, sizeof(p),
+ NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
int cros_ec_set_ldo(struct udevice *dev, uint8_t index, uint8_t state)
{
struct ec_params_ldo_set params;
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index ccf81abbe93..cf7f4c6840c 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -9,6 +9,15 @@ config DM_PWM
frequency/period can be controlled along with the proportion of that
time that the signal is high.
+config PWM_CROS_EC
+ bool "Enable support for the Chrome OS EC PWM"
+ depends on DM_PWM
+ help
+ This PWM is found on several Chrome OS devices and controlled by
+ the Chrome OS embedded controller. It may be used to control the
+ screen brightness and/or the keyboard backlight depending on the
+ device.
+
config PWM_EXYNOS
bool "Enable support for the Exynos PWM"
depends on DM_PWM
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index 0b9d2698a31..10d244bfb79 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -10,6 +10,7 @@
obj-$(CONFIG_DM_PWM) += pwm-uclass.o
+obj-$(CONFIG_PWM_CROS_EC) += cros_ec_pwm.o
obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o
obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
obj-$(CONFIG_PWM_MESON) += pwm-meson.o
diff --git a/drivers/pwm/cros_ec_pwm.c b/drivers/pwm/cros_ec_pwm.c
new file mode 100644
index 00000000000..44f4105dfd5
--- /dev/null
+++ b/drivers/pwm/cros_ec_pwm.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <cros_ec.h>
+#include <dm.h>
+#include <errno.h>
+#include <log.h>
+#include <pwm.h>
+
+struct cros_ec_pwm_priv {
+ bool enabled;
+ uint duty;
+};
+
+static int cros_ec_pwm_set_config(struct udevice *dev, uint channel,
+ uint period_ns, uint duty_ns)
+{
+ struct cros_ec_pwm_priv *priv = dev_get_priv(dev);
+ uint duty;
+ int ret;
+
+ debug("%s: period_ns=%u, duty_ns=%u asked\n", __func__,
+ period_ns, duty_ns);
+
+ /* No way to set the period, only a relative duty cycle */
+ duty = EC_PWM_MAX_DUTY * duty_ns / period_ns;
+ if (duty > EC_PWM_MAX_DUTY)
+ duty = EC_PWM_MAX_DUTY;
+
+ if (!priv->enabled) {
+ priv->duty = duty;
+ debug("%s: duty=%#x to-be-set\n", __func__, duty);
+ return 0;
+ }
+
+ ret = cros_ec_set_pwm_duty(dev->parent, channel, duty);
+ if (ret) {
+ debug("%s: duty=%#x failed\n", __func__, duty);
+ return ret;
+ }
+
+ priv->duty = duty;
+ debug("%s: duty=%#x set\n", __func__, duty);
+
+ return 0;
+}
+
+static int cros_ec_pwm_set_enable(struct udevice *dev, uint channel,
+ bool enable)
+{
+ struct cros_ec_pwm_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = cros_ec_set_pwm_duty(dev->parent, channel,
+ enable ? priv->duty : 0);
+ if (ret) {
+ debug("%s: enable=%d failed\n", __func__, enable);
+ return ret;
+ }
+
+ priv->enabled = enable;
+ debug("%s: enable=%d (duty=%#x) set\n", __func__,
+ enable, priv->duty);
+
+ return 0;
+}
+
+static const struct pwm_ops cros_ec_pwm_ops = {
+ .set_config = cros_ec_pwm_set_config,
+ .set_enable = cros_ec_pwm_set_enable,
+};
+
+static const struct udevice_id cros_ec_pwm_ids[] = {
+ { .compatible = "google,cros-ec-pwm" },
+ { }
+};
+
+U_BOOT_DRIVER(cros_ec_pwm) = {
+ .name = "cros_ec_pwm",
+ .id = UCLASS_PWM,
+ .of_match = cros_ec_pwm_ids,
+ .ops = &cros_ec_pwm_ops,
+ .priv_auto_alloc_size = sizeof(struct cros_ec_pwm_priv),
+};
diff --git a/include/cros_ec.h b/include/cros_ec.h
index eddc23d48f8..9396b4d2466 100644
--- a/include/cros_ec.h
+++ b/include/cros_ec.h
@@ -513,6 +513,19 @@ int cros_ec_efs_verify(struct udevice *dev, enum ec_flash_region region);
int cros_ec_battery_cutoff(struct udevice *dev, uint8_t flags);
/**
+ * cros_ec_set_pwm_duty() - Set duty cycle of a generic pwm
+ *
+ * Note that duty value needs to be passed to the EC as a 16 bit number
+ * for increased precision.
+ *
+ * @param dev CROS-EC device
+ * @param index Index of the pwm
+ * @param duty Desired duty cycle, in 0..EC_PWM_MAX_DUTY range.
+ * @return 0 if OK, -ve on error
+ */
+int cros_ec_set_pwm_duty(struct udevice *dev, uint8_t index, uint16_t duty);
+
+/**
* cros_ec_read_limit_power() - Check if power is limited by batter/charger
*
* Sometimes the battery is low and / or the device is connected to a charger