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-rw-r--r--arch/arm/dts/zynqmp-clk-ccf.dtsi4
-rw-r--r--arch/arm/dts/zynqmp.dtsi12
2 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 1098e890192..0b0fb6e9878 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -291,3 +291,7 @@
&xlnx_dp_snd_codec0 {
clocks = <&zynqmp_clk DP_AUDIO_REF>;
};
+
+&zynqmp_pcap {
+ clocks = <&zynqmp_clk PCAP>;
+};
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index ec0dd73e150..58ac62c4f85 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -149,6 +149,11 @@
#power-domain-cells = <0x1>;
u-boot,dm-pre-reloc;
+ zynqmp_pcap: pcap {
+ compatible = "xlnx,zynqmp-pcap-fpga";
+ clock-names = "ref_clk";
+ };
+
zynqmp_power: zynqmp-power {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-power";
@@ -180,9 +185,10 @@
fpga_full: fpga-full {
compatible = "fpga-region";
- fpga-mgr = <&pcap>;
+ fpga-mgr = <&zynqmp_pcap>;
#address-cells = <2>;
#size-cells = <2>;
+ ranges;
};
nvmem_firmware {
@@ -195,10 +201,6 @@
};
};
- pcap: pcap {
- compatible = "xlnx,zynqmp-pcap-fpga";
- };
-
rst: reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <1>;