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-rw-r--r--arch/arm/mach-rmobile/Kconfig.641
-rw-r--r--drivers/pinctrl/renesas/Kconfig10
-rw-r--r--drivers/pinctrl/renesas/Makefile1
-rw-r--r--drivers/pinctrl/renesas/pfc.c11
-rw-r--r--drivers/pinctrl/renesas/sh_pfc.h1
5 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 7eec65d8ea0..28c2628a3cb 100644
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -15,6 +15,7 @@ config R8A774B1
config R8A774C0
bool "Renesas SoC R8A774C0"
imply CLK_R8A774C0
+ imply PINCTRL_PFC_R8A774C0
config R8A774E1
bool "Renesas SoC R8A774E1"
diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index d2be4c84ba1..8fb9cba3875 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A774B1
the GPIO definitions and pin control functions for each available
multiplex function.
+config PINCTRL_PFC_R8A774C0
+ bool "Renesas RZ/G2 R8A774C0 pin control driver"
+ depends on PINCTRL_PFC
+ help
+ Support pin multiplexing control on Renesas RZ/G2E R8A774C0 SoCs.
+
+ The driver is controlled by a device tree node which contains both
+ the GPIO definitions and pin control functions for each available
+ multiplex function.
+
config PINCTRL_PFC_R8A774E1
bool "Renesas RZ/G2 R8A774E1 pin control driver"
depends on PINCTRL_PFC
diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index 1d007520512..0e2ac3c5136 100644
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_PINCTRL_PFC) += pfc.o
obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
+obj-$(CONFIG_PINCTRL_PFC_R8A774C0) += pfc-r8a77990.o
obj-$(CONFIG_PINCTRL_PFC_R8A774E1) += pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 6ff948420c5..07fcc3d3931 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -34,6 +34,7 @@ enum sh_pfc_model {
SH_PFC_R8A7796,
SH_PFC_R8A774A1,
SH_PFC_R8A774B1,
+ SH_PFC_R8A774C0,
SH_PFC_R8A774E1,
SH_PFC_R8A77965,
SH_PFC_R8A77970,
@@ -927,6 +928,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
if (model == SH_PFC_R8A774B1)
priv->pfc.info = &r8a774b1_pinmux_info;
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774C0
+ if (model == SH_PFC_R8A774C0)
+ priv->pfc.info = &r8a774c0_pinmux_info;
+#endif
#ifdef CONFIG_PINCTRL_PFC_R8A774E1
if (model == SH_PFC_R8A774E1)
priv->pfc.info = &r8a774e1_pinmux_info;
@@ -1014,6 +1019,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
.data = SH_PFC_R8A774B1,
},
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774C0
+ {
+ .compatible = "renesas,pfc-r8a774c0",
+ .data = SH_PFC_R8A774C0,
+ },
+#endif
#ifdef CONFIG_PINCTRL_PFC_R8A774E1
{
.compatible = "renesas,pfc-r8a774e1",
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 22cc860f296..f563916f109 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -295,6 +295,7 @@ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
extern const struct sh_pfc_soc_info r8a774b1_pinmux_info;
+extern const struct sh_pfc_soc_info r8a774c0_pinmux_info;
extern const struct sh_pfc_soc_info r8a774e1_pinmux_info;
extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
extern const struct sh_pfc_soc_info r8a7791_pinmux_info;