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-rw-r--r--arch/arm/mach-imx/mxs/Kconfig4
-rw-r--r--board/ppcag/bg0900/Kconfig15
-rw-r--r--board/ppcag/bg0900/MAINTAINERS6
-rw-r--r--board/ppcag/bg0900/Makefile10
-rw-r--r--board/ppcag/bg0900/bg0900.c89
-rw-r--r--board/ppcag/bg0900/spl_boot.c152
-rw-r--r--configs/bg0900_defconfig43
-rw-r--r--include/configs/bg0900.h39
8 files changed, 0 insertions, 358 deletions
diff --git a/arch/arm/mach-imx/mxs/Kconfig b/arch/arm/mach-imx/mxs/Kconfig
index 9f48ffda414..b2026a3758a 100644
--- a/arch/arm/mach-imx/mxs/Kconfig
+++ b/arch/arm/mach-imx/mxs/Kconfig
@@ -39,9 +39,6 @@ choice
prompt "MX28 board select"
optional
-config TARGET_BG0900
- bool "Support bg0900"
-
config TARGET_MX28EVK
bool "Support mx28evk"
select BOARD_EARLY_INIT_F
@@ -56,6 +53,5 @@ config SYS_SOC
source "board/freescale/mx28evk/Kconfig"
source "board/liebherr/xea/Kconfig"
-source "board/ppcag/bg0900/Kconfig"
endif
diff --git a/board/ppcag/bg0900/Kconfig b/board/ppcag/bg0900/Kconfig
deleted file mode 100644
index d7f2368a230..00000000000
--- a/board/ppcag/bg0900/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@
-if TARGET_BG0900
-
-config SYS_BOARD
- default "bg0900"
-
-config SYS_VENDOR
- default "ppcag"
-
-config SYS_SOC
- default "mxs"
-
-config SYS_CONFIG_NAME
- default "bg0900"
-
-endif
diff --git a/board/ppcag/bg0900/MAINTAINERS b/board/ppcag/bg0900/MAINTAINERS
deleted file mode 100644
index 853c0d59c8d..00000000000
--- a/board/ppcag/bg0900/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-BG0900 BOARD
-M: Marek Vasut <marex@denx.de>
-S: Maintained
-F: board/ppcag/bg0900/
-F: include/configs/bg0900.h
-F: configs/bg0900_defconfig
diff --git a/board/ppcag/bg0900/Makefile b/board/ppcag/bg0900/Makefile
deleted file mode 100644
index 540bd9dc12f..00000000000
--- a/board/ppcag/bg0900/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-ifndef CONFIG_SPL_BUILD
-obj-y := bg0900.o
-else
-obj-y := spl_boot.o
-endif
diff --git a/board/ppcag/bg0900/bg0900.c b/board/ppcag/bg0900/bg0900.c
deleted file mode 100644
index 578f5c73b6c..00000000000
--- a/board/ppcag/bg0900/bg0900.c
+++ /dev/null
@@ -1,89 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * PPC-AG BG0900 board
- *
- * Copyright (C) 2013 Marek Vasut <marex@denx.de>
- */
-
-#include <common.h>
-#include <init.h>
-#include <net.h>
-#include <asm/global_data.h>
-#include <asm/gpio.h>
-#include <asm/io.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/iomux-mx28.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/sys_proto.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-#include <miiphy.h>
-#include <netdev.h>
-#include <errno.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/*
- * Functions
- */
-int board_early_init_f(void)
-{
- /* IO0 clock at 480MHz */
- mxs_set_ioclk(MXC_IOCLK0, 480000);
- /* IO1 clock at 480MHz */
- mxs_set_ioclk(MXC_IOCLK1, 480000);
-
- /* SSP2 clock at 160MHz */
- mxs_set_sspclk(MXC_SSPCLK2, 160000, 0);
-
- return 0;
-}
-
-int dram_init(void)
-{
- return mxs_dram_init();
-}
-
-int board_init(void)
-{
- /* Adress of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
- return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(struct bd_info *bis)
-{
- struct mxs_clkctrl_regs *clkctrl_regs =
- (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
- struct eth_device *dev;
- int ret;
-
- ret = cpu_eth_init(bis);
-
- /* BG0900 uses ENET_CLK PAD to drive FEC clock */
- writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN,
- &clkctrl_regs->hw_clkctrl_enet);
-
- /* Reset FEC PHYs */
- gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
- udelay(200);
- gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
-
- ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
- if (ret) {
- puts("FEC MXS: Unable to init FEC0\n");
- return ret;
- }
-
- dev = eth_get_dev_by_name("FEC0");
- if (!dev) {
- puts("FEC MXS: Unable to get FEC0 device entry\n");
- return -EINVAL;
- }
-
- return ret;
-}
-
-#endif
diff --git a/board/ppcag/bg0900/spl_boot.c b/board/ppcag/bg0900/spl_boot.c
deleted file mode 100644
index b46bc8939a3..00000000000
--- a/board/ppcag/bg0900/spl_boot.c
+++ /dev/null
@@ -1,152 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * PPC-AG BG0900 Boot setup
- *
- * Copyright (C) 2013 Marek Vasut <marex@denx.de>
- */
-
-#include <common.h>
-#include <config.h>
-#include <asm/io.h>
-#include <asm/arch/iomux-mx28.h>
-#include <asm/arch/imx-regs.h>
-#include <asm/arch/sys_proto.h>
-
-#define MUX_CONFIG_GPMI (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
-#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
-#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
-#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP)
-
-const iomux_cfg_t iomux_setup[] = {
- /* DUART */
- MX28_PAD_PWM0__DUART_RX,
- MX28_PAD_PWM1__DUART_TX,
-
- /* GPMI NAND */
- MX28_PAD_GPMI_D00__GPMI_D0 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D01__GPMI_D1 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D02__GPMI_D2 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D03__GPMI_D3 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D04__GPMI_D4 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D05__GPMI_D5 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D06__GPMI_D6 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_D07__GPMI_D7 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_CE0N__GPMI_CE0N | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_RDY0__GPMI_READY0 | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_RDN__GPMI_RDN |
- (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
- MX28_PAD_GPMI_WRN__GPMI_WRN | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_ALE__GPMI_ALE | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_CLE__GPMI_CLE | MUX_CONFIG_GPMI,
- MX28_PAD_GPMI_RESETN__GPMI_RESETN | MUX_CONFIG_GPMI,
-
- /* FEC0 */
- MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
- MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
- MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
-
- /* FEC0 Reset */
- MX28_PAD_ENET0_RX_CLK__GPIO_4_13 |
- (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
-
- /* EMI */
- MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_ODT1__EMI_ODT1 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
- MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
- MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
-
- MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A13__EMI_ADDR13 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_A14__EMI_ADDR14 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
- MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
- MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
- MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
- MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
- MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI,
- MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
-
- /* SPI2 (for SPI flash) */
- MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
- MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
- MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
- MX28_PAD_SSP2_SS0__SSP2_D3 |
- (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
-};
-
-void mxs_adjust_memory_params(uint32_t *dram_vals)
-{
- /*
- * DDR Controller Registers
- * Manufacturer: Winbond
- * Device Part Number: W972GG6JB-25I
- * Clock Freq.: 200MHz
- * Density: 2Gb
- * Chip Selects: 1
- * Number of Banks: 8
- * Row address: 14
- * Column address: 10
- */
-
- dram_vals[0x74 / 4] = 0x0102010A;
- dram_vals[0x98 / 4] = 0x04005003;
- dram_vals[0x9c / 4] = 0x090000c8;
-
- dram_vals[0xa8 / 4] = 0x0036b009;
- dram_vals[0xac / 4] = 0x03270612;
-
- dram_vals[0xb0 / 4] = 0x02020202;
- dram_vals[0xb4 / 4] = 0x00c80029;
-
- dram_vals[0xc0 / 4] = 0x00011900;
-
- dram_vals[0x12c / 4] = 0x07400300;
- dram_vals[0x130 / 4] = 0x07400300;
- dram_vals[0x2c4 / 4] = 0x02030303;
-}
-
-void board_init_ll(const uint32_t arg, const uint32_t *resptr)
-{
- mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
-}
diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig
deleted file mode 100644
index a3282eba41a..00000000000
--- a/configs/bg0900_defconfig
+++ /dev/null
@@ -1,43 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_MX28=y
-CONFIG_SYS_TEXT_BASE=0x40002000
-CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SIZE=0x4000
-CONFIG_IMX_CONFIG=""
-CONFIG_SPL_TEXT_BASE=0x00001000
-CONFIG_TARGET_BG0900=y
-CONFIG_SPL_SERIAL=y
-CONFIG_SPL=y
-CONFIG_SYS_LOAD_ADDR=0x42000000
-CONFIG_BOOTDELAY=3
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyAMA0,115200"
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_BOARD_EARLY_INIT_F=y
-# CONFIG_SPL_FRAMEWORK is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-# CONFIG_CMD_FLASH is not set
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_NAND_TRIMFFS=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
-CONFIG_DOS_PARTITION=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_MXS_GPIO=y
-# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_MXS=y
-CONFIG_MII=y
-CONFIG_CONS_INDEX=0
-CONFIG_SPI=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/bg0900.h b/include/configs/bg0900.h
deleted file mode 100644
index d9599b85911..00000000000
--- a/include/configs/bg0900.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2013 Marek Vasut <marex@denx.de>
- */
-#ifndef __CONFIGS_BG0900_H__
-#define __CONFIGS_BG0900_H__
-
-/* Memory configuration */
-#define PHYS_SDRAM_1 0x40000000 /* Base address */
-#define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-
-/* Environment */
-
-/* FEC Ethernet on SoC */
-#ifdef CONFIG_CMD_NET
-#define CONFIG_FEC_MXC
-#endif
-
-/* Boot Linux */
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_BOOTCOMMAND "bootm"
-
-/* Extra Environment */
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "update_spi_firmware_filename=u-boot.sb\0" \
- "update_spi_firmware_maxsz=0x80000\0" \
- "update_spi_firmware=" /* Update the SPI flash firmware */ \
- "if sf probe 2:0 ; then " \
- "if tftp ${update_spi_firmware_filename} ; then " \
- "sf erase 0x0 +${filesize} ; " \
- "sf write ${loadaddr} 0x0 ${filesize} ; " \
- "fi ; " \
- "fi\0"
-
-/* The rest of the configuration is shared */
-#include <configs/mxs.h>
-
-#endif /* __CONFIGS_BG0900_H__ */
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