diff options
| -rw-r--r-- | arch/x86/dts/crownbay.dts | 2 | ||||
| -rw-r--r-- | board/intel/crownbay/crownbay.c | 7 | ||||
| -rw-r--r-- | include/configs/crownbay.h | 3 |
3 files changed, 5 insertions, 7 deletions
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index 3af9cc3d260..800901c2cbe 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -168,7 +168,7 @@ compatible = "intel,irq-router"; intel,pirq-config = "pci"; intel,pirq-link = <0x60 8>; - intel,pirq-mask = <0xdee0>; + intel,pirq-mask = <0xcee0>; intel,pirq-routing = < /* TunnelCreek PCI devices */ PCI_BDF(0, 2, 0) INTA PIRQE diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c index ad2d5b69d6e..d6de9fabc03 100644 --- a/board/intel/crownbay/crownbay.c +++ b/board/intel/crownbay/crownbay.c @@ -10,11 +10,12 @@ #include <netdev.h> #include <smsc_lpc47m.h> -#define SERIAL_DEV PNP_DEV(0x2e, 4) - int board_early_init_f(void) { - lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ); + lpc47m_enable_serial(PNP_DEV(LPC47M_IO_PORT, LPC47M_SP1), + UART0_BASE, UART0_IRQ); + lpc47m_enable_kbc(PNP_DEV(LPC47M_IO_PORT, LPC47M_KBC), + KBD_IRQ, MSE_IRQ); return 0; } diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index 162f08ff1e6..998da78842b 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -53,9 +53,6 @@ #define CONFIG_PCH_GBE #define CONFIG_PHYLIB -/* TunnelCreek IGD support */ -#define CONFIG_VGA_AS_SINGLE_DEVICE - /* Environment configuration */ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0 |