diff options
| -rw-r--r-- | arch/arm/mach-mvebu/Kconfig | 13 | ||||
| -rw-r--r-- | arch/arm/mach-mvebu/spl.c | 7 |
2 files changed, 19 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index d23cc0c760f..7d487f270b5 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -213,6 +213,19 @@ config DDR_LOG_LEVEL At level 3, rovides the windows margin of each DQ as a results of DQS centeralization. +config DDR_RESET_ON_TRAINING_FAILURE + bool "Reset the board on DDR training failure instead of hanging" + depends on ARMADA_38X || ARMADA_XP + help + If DDR training fails in SPL, reset the board instead of hanging. + Some boards are known to fail DDR training occasionally and an + immediate reset may be preferable to waiting until the board is + reset by watchdog (if there even is one). + + Note that if booting via UART and the DDR training fails, the + device will still hang - it doesn't make sense to reset the board + in such a case. + config SYS_BOARD default "clearfog" if TARGET_CLEARFOG default "helios4" if TARGET_HELIOS4 diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c index 273ecb8bd6c..5ad323f9d9d 100644 --- a/arch/arm/mach-mvebu/spl.c +++ b/arch/arm/mach-mvebu/spl.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <cpu_func.h> #include <dm.h> #include <fdtdec.h> #include <hang.h> @@ -330,7 +331,11 @@ void board_init_f(ulong dummy) ret = ddr3_init(); if (ret) { printf("ddr3_init() failed: %d\n", ret); - hang(); + if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) && + get_boot_device() != BOOT_DEVICE_UART) + reset_cpu(); + else + hang(); } #endif |