diff options
| -rw-r--r-- | .azure-pipelines.yml | 8 | ||||
| -rw-r--r-- | .gitlab-ci.yml | 8 | ||||
| -rw-r--r-- | .travis.yml | 8 | ||||
| -rw-r--r-- | arch/riscv/cpu/cpu.c | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/fu540/Kconfig | 13 | ||||
| -rw-r--r-- | arch/riscv/cpu/start.S | 2 | ||||
| -rw-r--r-- | arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 16 | ||||
| -rw-r--r-- | arch/riscv/lib/reset.c | 2 | ||||
| -rw-r--r-- | arch/riscv/lib/sifive_clint.c | 16 | ||||
| -rw-r--r-- | board/AndesTech/ax25-ae350/ax25-ae350.c | 3 | ||||
| -rw-r--r-- | board/emulation/qemu-riscv/Kconfig | 4 | ||||
| -rw-r--r-- | board/sifive/fu540/Kconfig | 5 | ||||
| -rw-r--r-- | board/sifive/fu540/fu540.c | 25 | ||||
| -rw-r--r-- | common/spl/spl_opensbi.c | 5 | ||||
| -rw-r--r-- | configs/sifive_fu540_defconfig | 4 | ||||
| -rw-r--r-- | doc/board/sifive/fu540.rst | 41 | ||||
| -rw-r--r-- | drivers/ram/sifive/fu540_ddr.c | 30 | ||||
| -rw-r--r-- | drivers/serial/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/sysreset/sysreset_syscon.c | 28 | ||||
| -rw-r--r-- | include/configs/sifive-fu540.h | 7 |
20 files changed, 178 insertions, 51 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 97c89fc0671..303857c1fc7 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -295,12 +295,12 @@ jobs: grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then - wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; - export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; fi if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then - wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; - export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; fi # the below corresponds to .gitlab-ci.yml "script" cd ${WORK_DIR} diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index d2f864669d8..e8ad3f42e5b 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -21,12 +21,12 @@ stages: - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then - wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; - export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; fi - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then - wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; - export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; fi after_script: diff --git a/.travis.yml b/.travis.yml index 1ff140855ea..96fd55fe1ef 100644 --- a/.travis.yml +++ b/.travis.yml @@ -204,12 +204,12 @@ before_script: popd; fi - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then - wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; - export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/ilp32/generic/firmware/fw_dynamic.bin; fi - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then - wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; - export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + wget -O - https://github.com/riscv/opensbi/releases/download/v0.8/opensbi-0.8-rv-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.8-rv-bin/share/opensbi/lp64/generic/firmware/fw_dynamic.bin; fi script: diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index bbd6c153527..bfa2d4a4269 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -107,7 +107,7 @@ int arch_cpu_init_dm(void) #endif } -#ifdef CONFIG_SMP +#if CONFIG_IS_ENABLED(SMP) ret = riscv_init_ipi(); if (ret) return ret; diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig index e9302e87c0d..2dcad8e27f7 100644 --- a/arch/riscv/cpu/fu540/Kconfig +++ b/arch/riscv/cpu/fu540/Kconfig @@ -13,3 +13,16 @@ config SIFIVE_FU540 imply SPL_CPU_SUPPORT imply SPL_OPENSBI imply SPL_LOAD_FIT + +if ENV_IS_IN_SPI_FLASH + +config ENV_OFFSET + default 0x505000 + +config ENV_SIZE + default 0x20000 + +config ENV_SECT_SIZE + default 0x10000 + +endif # ENV_IS_IN_SPI_FLASH diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index f408e41ab9d..bf9fdf369b4 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -193,6 +193,7 @@ spl_stack_gd_setup: mv sp, s0 #endif +#if CONFIG_IS_ENABLED(SMP) /* set new stack and global data pointer on secondary harts */ spl_secondary_hart_stack_gd_setup: la a0, secondary_hart_relocate @@ -207,6 +208,7 @@ spl_secondary_hart_stack_gd_setup: la a0, secondary_harts_relocation_error jal printf jal hang +#endif /* set new global data pointer on main hart */ 1: mv gp, s0 diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index e0371505206..5d0c928b296 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -16,6 +16,14 @@ spi2 = &qspi2; }; + config { + u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */ + }; + + memory@80000000 { + u-boot,dm-spl; + }; + hfclk { u-boot,dm-spl; }; @@ -26,6 +34,14 @@ }; +&qspi0 { + u-boot,dm-spl; + + flash@0 { + u-boot,dm-spl; + }; +}; + &qspi2 { mmc@0 { u-boot,dm-spl; diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c index 6008bbe78e7..8779c619cc5 100644 --- a/arch/riscv/lib/reset.c +++ b/arch/riscv/lib/reset.c @@ -7,7 +7,6 @@ #include <command.h> #include <hang.h> -#ifndef CONFIG_SYSRESET int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { printf("resetting ...\n"); @@ -17,4 +16,3 @@ int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) return 0; } -#endif diff --git a/arch/riscv/lib/sifive_clint.c b/arch/riscv/lib/sifive_clint.c index 78fc6c868dd..b9a2c649cc4 100644 --- a/arch/riscv/lib/sifive_clint.c +++ b/arch/riscv/lib/sifive_clint.c @@ -26,6 +26,9 @@ DECLARE_GLOBAL_DATA_PTR; int riscv_get_time(u64 *time) { + /* ensure timer register base has a sane value */ + riscv_init_ipi(); + *time = readq((void __iomem *)MTIME_REG(gd->arch.clint)); return 0; @@ -33,6 +36,9 @@ int riscv_get_time(u64 *time) int riscv_set_timecmp(int hart, u64 cmp) { + /* ensure timer register base has a sane value */ + riscv_init_ipi(); + writeq(cmp, (void __iomem *)MTIMECMP_REG(gd->arch.clint, hart)); return 0; @@ -40,11 +46,13 @@ int riscv_set_timecmp(int hart, u64 cmp) int riscv_init_ipi(void) { - long *ret = syscon_get_first_range(RISCV_SYSCON_CLINT); + if (!gd->arch.clint) { + long *ret = syscon_get_first_range(RISCV_SYSCON_CLINT); - if (IS_ERR(ret)) - return PTR_ERR(ret); - gd->arch.clint = ret; + if (IS_ERR(ret)) + return PTR_ERR(ret); + gd->arch.clint = ret; + } return 0; } diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index add0d56ef2d..59a43e4dcc4 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -71,7 +71,8 @@ int smc_init(void) if (node < 0) return -FDT_ERR_NOTFOUND; - addr = fdtdec_get_addr(blob, node, "reg"); + addr = fdtdec_get_addr_size_auto_noparent(blob, node, + "reg", 0, NULL, false); if (addr == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index ad99b08b447..617c4aa33ff 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -53,5 +53,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply NVME imply SPL_RAM_SUPPORT imply SPL_RAM_DEVICE + imply SYSRESET + imply SYSRESET_SYSCON + imply CMD_POWEROFF + imply SYSRESET_CMD_POWEROFF endif diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig index 86193d7668b..f3217f62c43 100644 --- a/board/sifive/fu540/Kconfig +++ b/board/sifive/fu540/Kconfig @@ -27,6 +27,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select SIFIVE_FU540 select SUPPORT_SPL + select ENV_IS_IN_SPI_FLASH select RAM select SPL_RAM if SPL imply CMD_DHCP @@ -65,5 +66,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply SMP imply MISC imply SIFIVE_OTP + imply DM_PWM + imply PWM_SIFIVE + imply SYSRESET + imply SYSRESET_GPIO endif diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c index 27ff52f9035..57753ba50ba 100644 --- a/board/sifive/fu540/fu540.c +++ b/board/sifive/fu540/fu540.c @@ -10,6 +10,7 @@ #include <env.h> #include <init.h> #include <log.h> +#include <linux/bitops.h> #include <linux/bug.h> #include <linux/delay.h> #include <linux/io.h> @@ -128,14 +129,26 @@ int board_init(void) } #ifdef CONFIG_SPL +#define MODE_SELECT_REG 0x1000 +#define MODE_SELECT_QSPI 0x6 +#define MODE_SELECT_SD 0xb +#define MODE_SELECT_MASK GENMASK(3, 0) + u32 spl_boot_device(void) { -#ifdef CONFIG_SPL_MMC_SUPPORT - return BOOT_DEVICE_MMC1; -#else - puts("Unknown boot device\n"); - hang(); -#endif + u32 mode_select = readl((void *)MODE_SELECT_REG); + u32 boot_device = mode_select & MODE_SELECT_MASK; + + switch (boot_device) { + case MODE_SELECT_QSPI: + return BOOT_DEVICE_SPI; + case MODE_SELECT_SD: + return BOOT_DEVICE_MMC1; + default: + debug("Unsupported boot device 0x%x but trying MMC1\n", + boot_device); + return BOOT_DEVICE_MMC1; + } } #endif diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c index 3440bc0294d..14f335f75f0 100644 --- a/common/spl/spl_opensbi.c +++ b/common/spl/spl_opensbi.c @@ -79,11 +79,6 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image) invalidate_icache_all(); #ifdef CONFIG_SPL_SMP - /* Initialize the IPI before we use it */ - ret = riscv_init_ipi(); - if (ret) - hang(); - /* * Start OpenSBI on all secondary harts and wait for acknowledgment. * diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index 9e00a56ce64..06e17860c64 100644 --- a/configs/sifive_fu540_defconfig +++ b/configs/sifive_fu540_defconfig @@ -6,6 +6,7 @@ CONFIG_SPL_DM_SPI=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_TARGET_SIFIVE_FU540=y CONFIG_ARCH_RV64I=y @@ -16,8 +17,11 @@ CONFIG_MISC_INIT_R=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_SPI_LOAD=y CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y CONFIG_DM_MTD=y diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index 739eefa6697..1ce9ab14f5c 100644 --- a/doc/board/sifive/fu540.rst +++ b/doc/board/sifive/fu540.rst @@ -533,3 +533,44 @@ Sample boot log from HiFive Unleashed board type: 0fc63daf-8483-4772-8e79-3d69d8477de4 type: linux guid: 9faa81b6-39b1-4418-af5e-89c48f29c20d + +Booting from SPI +---------------- + +Use Building steps from "Booting from MMC using U-Boot SPL" section. + +Partition the SPI in Linux via mtdblock. (Require to boot the board in +SD boot mode by enabling MTD block in Linux) + +Use prebuilt image from here [1], which support to partition the SPI flash. + +.. code-block:: none + + # sgdisk --clear \ + > --set-alignment=2 \ + > --new=1:40:2087 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ + > --new=2:2088:10279 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ + > --new=3:10536:65494 --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ + > /dev/mtdblock0 + +Program the SPI (Require to boot the board in SD boot mode) + +Execute below steps on U-Boot proper, + +.. code-block:: none + + tftpboot $kernel_addr_r u-boot-spl.bin + sf erase 0x5000 $filesize + sf write $kernel_addr_r 0x5000 $filesize + + tftpboot $kernel_addr_r u-boot.itb + sf erase 0x105000 $filesize + sf write $kernel_addr_r 0x105000 $filesize + +Power off the board + +Change DIP switches MSEL[3:0] are set to 0110 + +Power up the board. + +[1] https://github.com/amarula/bsp-sifive diff --git a/drivers/ram/sifive/fu540_ddr.c b/drivers/ram/sifive/fu540_ddr.c index f8f8ca9ad55..2eef1e75658 100644 --- a/drivers/ram/sifive/fu540_ddr.c +++ b/drivers/ram/sifive/fu540_ddr.c @@ -8,6 +8,7 @@ #include <common.h> #include <dm.h> +#include <fdtdec.h> #include <init.h> #include <ram.h> #include <regmap.h> @@ -39,9 +40,6 @@ #define DENALI_PHY_1152 1152 #define DENALI_PHY_1214 1214 -#define PAYLOAD_DEST 0x80000000 -#define DDR_MEM_SIZE (8UL * 1024UL * 1024UL * 1024UL) - #define DRAM_CLASS_OFFSET 8 #define DRAM_CLASS_DDR4 0xA #define OPTIMAL_RMODW_EN_OFFSET 0 @@ -65,6 +63,8 @@ #define PHY_RX_CAL_DQ0_0_OFFSET 0 #define PHY_RX_CAL_DQ1_0_OFFSET 16 +DECLARE_GLOBAL_DATA_PTR; + struct fu540_ddrctl { volatile u32 denali_ctl[265]; }; @@ -235,8 +235,8 @@ static int fu540_ddr_setup(struct udevice *dev) struct fu540_ddr_params *params = &plat->ddr_params; volatile u32 *denali_ctl = priv->ctl->denali_ctl; volatile u32 *denali_phy = priv->phy->denali_phy; - const u64 ddr_size = DDR_MEM_SIZE; - const u64 ddr_end = PAYLOAD_DEST + ddr_size; + const u64 ddr_size = priv->info.size; + const u64 ddr_end = priv->info.base + ddr_size; int ret, i; u32 physet; @@ -302,7 +302,7 @@ static int fu540_ddr_setup(struct udevice *dev) | (1 << MULTIPLE_OUT_OF_RANGE_OFFSET)); /* set up range protection */ - fu540_ddr_setup_range_protection(denali_ctl, DDR_MEM_SIZE); + fu540_ddr_setup_range_protection(denali_ctl, priv->info.size); /* Mask off port command error interrupt DENALI_CTL_136 */ setbits_le32(DENALI_CTL_136 + denali_ctl, @@ -314,14 +314,14 @@ static int fu540_ddr_setup(struct udevice *dev) /* check size */ priv->info.size = get_ram_size((long *)priv->info.base, - DDR_MEM_SIZE); + ddr_size); debug("%s : %lx\n", __func__, priv->info.size); /* check memory access for all memory */ - if (priv->info.size != DDR_MEM_SIZE) { + if (priv->info.size != ddr_size) { printf("DDR invalid size : 0x%lx, expected 0x%lx\n", - priv->info.size, DDR_MEM_SIZE); + priv->info.size, (uintptr_t)ddr_size); return -EINVAL; } @@ -333,6 +333,11 @@ static int fu540_ddr_probe(struct udevice *dev) { struct fu540_ddr_info *priv = dev_get_priv(dev); + /* Read memory base and size from DT */ + fdtdec_setup_mem_size_base(); + priv->info.base = gd->ram_base; + priv->info.size = gd->ram_size; + #if defined(CONFIG_SPL_BUILD) struct regmap *map; int ret; @@ -368,14 +373,9 @@ static int fu540_ddr_probe(struct udevice *dev) priv->phy = regmap_get_range(map, 1); priv->physical_filter_ctrl = regmap_get_range(map, 2); - priv->info.base = CONFIG_SYS_SDRAM_BASE; - - priv->info.size = 0; return fu540_ddr_setup(dev); -#else - priv->info.base = CONFIG_SYS_SDRAM_BASE; - priv->info.size = DDR_MEM_SIZE; #endif + return 0; } diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 14df2e92471..e146ffc5f86 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -359,7 +359,7 @@ config DEBUG_UART_SANDBOX config DEBUG_UART_SIFIVE bool "SiFive UART" - depends on PL01X_SERIAL + depends on SIFIVE_SERIAL help Select this to enable a debug UART using the serial_sifive driver. You will need to provide parameters to make this work. The driver will diff --git a/drivers/sysreset/sysreset_syscon.c b/drivers/sysreset/sysreset_syscon.c index f64701aab3c..1c474866145 100644 --- a/drivers/sysreset/sysreset_syscon.c +++ b/drivers/sysreset/sysreset_syscon.c @@ -19,6 +19,7 @@ struct syscon_reboot_priv { struct regmap *regmap; unsigned int offset; unsigned int mask; + unsigned int value; }; static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type) @@ -29,7 +30,7 @@ static int syscon_reboot_request(struct udevice *dev, enum sysreset_t type) if (type != driver_data) return -EPROTONOSUPPORT; - regmap_write(priv->regmap, priv->offset, priv->mask); + regmap_update_bits(priv->regmap, priv->offset, priv->mask, priv->value); return -EINPROGRESS; } @@ -41,6 +42,8 @@ static struct sysreset_ops syscon_reboot_ops = { int syscon_reboot_probe(struct udevice *dev) { struct syscon_reboot_priv *priv = dev_get_priv(dev); + int err; + int mask_err, value_err; priv->regmap = syscon_regmap_lookup_by_phandle(dev, "regmap"); if (IS_ERR(priv->regmap)) { @@ -48,8 +51,27 @@ int syscon_reboot_probe(struct udevice *dev) return -ENODEV; } - priv->offset = dev_read_u32_default(dev, "offset", 0); - priv->mask = dev_read_u32_default(dev, "mask", 0); + err = dev_read_u32(dev, "offset", &priv->offset); + if (err) { + pr_err("unable to find offset\n"); + return -ENOENT; + } + + mask_err = dev_read_u32(dev, "mask", &priv->mask); + value_err = dev_read_u32(dev, "value", &priv->value); + if (mask_err && value_err) { + pr_err("unable to find mask and value\n"); + return -EINVAL; + } + + if (value_err) { + /* support old binding */ + priv->value = priv->mask; + priv->mask = 0xffffffff; + } else if (mask_err) { + /* support value without mask*/ + priv->mask = 0xffffffff; + } return 0; } diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h index 72c841eb9bf..f21411a701b 100644 --- a/include/configs/sifive-fu540.h +++ b/include/configs/sifive-fu540.h @@ -43,9 +43,11 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ + func(SF, sf, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> +#include <environment/distro/sf.h> #define TYPE_GUID_LOADER1 "5B193300-FC78-40CD-8002-E86C45580B47" #define TYPE_GUID_LOADER2 "2E54B353-1271-4842-806F-E436D6AF6985" @@ -62,13 +64,16 @@ "kernel_addr_r=0x84000000\0" \ "fdt_addr_r=0x88000000\0" \ "scriptaddr=0x88100000\0" \ + "script_offset_f=0x1fff000\0" \ + "script_size_f=0x1000\0" \ "pxefile_addr_r=0x88200000\0" \ "ramdisk_addr_r=0x88300000\0" \ "type_guid_gpt_loader1=" TYPE_GUID_LOADER1 "\0" \ "type_guid_gpt_loader2=" TYPE_GUID_LOADER2 "\0" \ "type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \ "partitions=" PARTS_DEFAULT "\0" \ - BOOTENV + BOOTENV \ + BOOTENV_SF #define CONFIG_PREBOOT \ "setenv fdt_addr ${fdtcontroladdr};" \ |