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-rw-r--r--arch/arm/include/asm/pcie_layerscape.h13
-rw-r--r--board/freescale/ls1021aqds/ls1021aqds.c5
-rw-r--r--board/freescale/ls1021atwr/ls1021atwr.c5
-rw-r--r--drivers/pci/pcie_layerscape.c5
4 files changed, 6 insertions, 22 deletions
diff --git a/arch/arm/include/asm/pcie_layerscape.h b/arch/arm/include/asm/pcie_layerscape.h
deleted file mode 100644
index fb08578f10a..00000000000
--- a/arch/arm/include/asm/pcie_layerscape.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/*
- * Copyright 2014 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __PCIE_LAYERSCAPE_H_
-#define __PCIE_LAYERSCAPE_H_
-
-void pci_init_board(void);
-void ft_pcie_setup(void *blob, bd_t *bd);
-
-#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 69a56719ef3..92f613ad241 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -12,7 +12,6 @@
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/ls102xa_stream_id.h>
-#include <asm/pcie_layerscape.h>
#include <hwconfig.h>
#include <mmc.h>
#include <fsl_esdhc.h>
@@ -623,8 +622,8 @@ int ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCIE_LAYERSCAPE
- ft_pcie_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
#endif
return 0;
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 8633ec08dde..ed5bd27ec0f 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -12,7 +12,6 @@
#include <asm/arch/clock.h>
#include <asm/arch/fsl_serdes.h>
#include <asm/arch/ls102xa_stream_id.h>
-#include <asm/pcie_layerscape.h>
#include <hwconfig.h>
#include <mmc.h>
#include <fsl_esdhc.h>
@@ -568,8 +567,8 @@ int ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCIE_LAYERSCAPE
- ft_pcie_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
#endif
return 0;
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index bcad8f2aec0..1b0b8142824 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -11,7 +11,6 @@
#include <asm/io.h>
#include <errno.h>
#include <malloc.h>
-#include <asm/pcie_layerscape.h>
#ifndef CONFIG_SYS_PCI_MEMORY_BUS
#define CONFIG_SYS_PCI_MEMORY_BUS CONFIG_SYS_SDRAM_BASE
@@ -486,7 +485,7 @@ static void ft_pcie_ls_setup(void *blob, const char *pci_compat,
fdt_set_node_status(blob, off, FDT_STATUS_DISABLED, 0);
}
-void ft_pcie_setup(void *blob, bd_t *bd)
+void ft_pci_setup(void *blob, bd_t *bd)
{
#ifdef CONFIG_PCIE1
ft_pcie_ls_setup(blob, FSL_PCIE_COMPAT, CONFIG_SYS_PCIE1_ADDR, PCIE1);
@@ -506,7 +505,7 @@ void ft_pcie_setup(void *blob, bd_t *bd)
}
#else
-void ft_pcie_setup(void *blob, bd_t *bd)
+void ft_pci_setup(void *blob, bd_t *bd)
{
}
#endif