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-rw-r--r--board/siemens/smartweb/smartweb.c29
-rw-r--r--board/siemens/taurus/taurus.c27
-rw-r--r--include/configs/smartweb.h53
-rw-r--r--include/configs/taurus.h30
4 files changed, 124 insertions, 15 deletions
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
index cf8a7f5b061..2d424882a9c 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -25,6 +25,7 @@
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_spi.h>
#include <spi.h>
+#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <watchdog.h>
#ifdef CONFIG_MACB
@@ -108,6 +109,29 @@ static void smartweb_macb_hw_init(void)
}
#endif /* CONFIG_MACB */
+#ifdef CONFIG_USB_GADGET_AT91
+#include <linux/usb/at91_udc.h>
+
+void at91_udp_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+
+ /* Enable PLLB */
+ writel(get_pllb_init(), &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+ ;
+
+ /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
+ at91_periph_clk_enable(ATMEL_ID_UDP);
+
+ writel(AT91SAM926x_PMC_UDP, &pmc->scer);
+}
+
+struct at91_udc_data board_udc_data = {
+ .baseaddr = ATMEL_BASE_UDP0,
+};
+#endif
+
int board_early_init_f(void)
{
/* enable this here, as we have SPL without serial support */
@@ -134,6 +158,11 @@ int board_init(void)
at91_set_gpio_output(AT91_PIN_PC10, 0);
at91_set_gpio_output(AT91_PIN_PC11, 1);
+#ifdef CONFIG_USB_GADGET_AT91
+ at91_udp_hw_init();
+ at91_udc_probe(&board_udc_data);
+#endif
+
return 0;
}
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index edeb15ba48d..72c5e6083d5 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -285,6 +285,29 @@ void spi_cs_deactivate(struct spi_slave *slave)
at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
}
+#ifdef CONFIG_USB_GADGET_AT91
+#include <linux/usb/at91_udc.h>
+
+void at91_udp_hw_init(void)
+{
+ at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
+
+ /* Enable PLLB */
+ writel(get_pllb_init(), &pmc->pllbr);
+ while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+ ;
+
+ /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
+ at91_periph_clk_enable(ATMEL_ID_UDP);
+
+ writel(AT91SAM926x_PMC_UDP, &pmc->scer);
+}
+
+struct at91_udc_data board_udc_data = {
+ .baseaddr = ATMEL_BASE_UDP0,
+};
+#endif
+
int board_init(void)
{
/* adress of boot parameters */
@@ -297,6 +320,10 @@ int board_init(void)
taurus_macb_hw_init();
#endif
at91_spi0_hw_init(TAURUS_SPI_MASK);
+#ifdef CONFIG_USB_GADGET_AT91
+ at91_udp_hw_init();
+ at91_udc_probe(&board_udc_data);
+#endif
return 0;
}
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index d696d4becec..d189c3fde97 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -28,6 +28,7 @@
* In this case SoC is defined in boards.cfg.
*/
#include <asm/hardware.h>
+#include <linux/sizes.h>
/*
* Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
@@ -64,7 +65,7 @@
*/
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
-#define CONFIG_SYS_SDRAM_SIZE (64 << 20)
+#define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M)
/*
* Perform a SDRAM Memtest from the start of SDRAM
@@ -75,7 +76,7 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN \
- ROUND(3 * CONFIG_ENV_SIZE + (128 << 10), 0x1000)
+ ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
/* NAND flash settings */
#define CONFIG_NAND_ATMEL
@@ -140,15 +141,42 @@
#if !defined(CONFIG_SPL_BUILD)
/* USB configuration */
+#define CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_STORAGE
-#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_MCS7830
+
+/* USB DFU support */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_AT91
+
+/* DFU class support */
+#define CONFIG_CMD_DFU
+#define CONFIG_USB_FUNCTION_DFU
+#define CONFIG_DFU_NAND
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M
+#define DFU_MANIFEST_POLL_TIMEOUT 25000
+
+/* USB DFU IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x0908
+#define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
+#define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
+
+#define CONFIG_SYS_CACHELINE_SIZE 0x2000
#endif
/* General Boot Parameter */
@@ -173,8 +201,8 @@
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET (0x100000)
#define CONFIG_ENV_OFFSET_REDUND (0x180000)
-#define CONFIG_ENV_RANGE (0x80000)
-#define CONFIG_ENV_SIZE (0x20000)
+#define CONFIG_ENV_RANGE (SZ_512K)
+#define CONFIG_ENV_SIZE (SZ_128K)
/*
* Predefined environment variables.
@@ -193,7 +221,6 @@
#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_NAND
-#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#ifdef CONFIG_MACB
@@ -230,10 +257,10 @@
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x0
-#define CONFIG_SPL_MAX_SIZE (4 * 1024)
+#define CONFIG_SPL_MAX_SIZE (SZ_4K)
#define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SPL_BSS_MAX_SIZE (16 * 1024)
+#define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
CONFIG_SPL_BSS_MAX_SIZE)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
@@ -253,14 +280,14 @@
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_SIZE (256*1024*1024)
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_SIZE (SZ_256M)
+#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
+#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index c1fed9afb47..12994c80659 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -121,12 +121,38 @@
/* USB */
#if defined(CONFIG_BOARD_TAURUS)
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE
+
+/* USB DFU support */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+
+#define CONFIG_USB_GADGET
+#define CONFIG_USB_GADGET_AT91
+
+/* DFU class support */
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_DFU
+#define CONFIG_USB_FUNCTION_DFU
+#define CONFIG_DFU_NAND
+#define CONFIG_USB_GADGET_DOWNLOAD
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
+#define DFU_MANIFEST_POLL_TIMEOUT 25000
+
+/* USB DFU IDs */
+#define CONFIG_G_DNL_VENDOR_NUM 0x0908
+#define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
+#define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
+
+#define CONFIG_SYS_CACHELINE_SIZE SZ_8K
#endif
/* SPI EEPROM */
@@ -242,7 +268,7 @@
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN \
- ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, 0x1000)
+ ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
@@ -271,7 +297,7 @@
#define CONFIG_SPL_NAND_RAW_ONLY
#define CONFIG_SPL_NAND_SOFTECC
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-10 07:54:39 +0000