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Diffstat (limited to 'arch/arm/dts/r8a77965-ulcb-u-boot.dtsi')
-rw-r--r--arch/arm/dts/r8a77965-ulcb-u-boot.dtsi62
1 files changed, 62 insertions, 0 deletions
diff --git a/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi b/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi
new file mode 100644
index 00000000000..aa5de3d0465
--- /dev/null
+++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dtsi
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the ULCB board
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#include "r8a77965-u-boot.dtsi"
+
+/ {
+ cpld {
+ compatible = "renesas,ulcb-cpld";
+ status = "okay";
+ gpio-sck = <&gpio6 8 0>;
+ gpio-mosi = <&gpio6 7 0>;
+ gpio-miso = <&gpio6 10 0>;
+ gpio-sstbz = <&gpio2 3 0>;
+ };
+
+ sysinfo {
+ compatible = "renesas,rcar-sysinfo";
+ i2c-eeprom = <&sysinfo_eeprom>;
+ bootph-all;
+ };
+};
+
+&i2c_dvfs {
+ bootph-all;
+
+ sysinfo_eeprom: eeprom@50 {
+ compatible = "rohm,br24t01", "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <8>;
+ bootph-all;
+ status = "okay";
+ };
+};
+
+&rpc {
+ reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0x04000000>;
+ status = "disabled";
+};
+
+&sdhi0 {
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr104;
+ max-frequency = <208000000>;
+ status = "okay";
+};
+
+&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+ status = "okay";
+};
+
+&vcc_sdhi0 {
+ u-boot,off-on-delay-us = <20000>;
+};