aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/dts/uniphier-ld20-global.dts
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/dts/uniphier-ld20-global.dts')
-rw-r--r--arch/arm/dts/uniphier-ld20-global.dts61
1 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/dts/uniphier-ld20-global.dts b/arch/arm/dts/uniphier-ld20-global.dts
new file mode 100644
index 00000000000..535c0eeed54
--- /dev/null
+++ b/arch/arm/dts/uniphier-ld20-global.dts
@@ -0,0 +1,61 @@
+/*
+ * Device Tree Source for UniPhier LD20 Global Board
+ *
+ * Copyright (C) 2015-2017 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+ */
+
+/dts-v1/;
+/include/ "uniphier-ld20.dtsi"
+
+/ {
+ model = "UniPhier LD20 Global Board (REF_LD20_GP)";
+ compatible = "socionext,uniphier-ld20-global",
+ "socionext,uniphier-ld20";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0 0x80000000 0 0xc0000000>;
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+/* for U-Boot only */
+&serial0 {
+ u-boot,dm-pre-reloc;
+};
+
+&pinctrl_uart0 {
+ u-boot,dm-pre-reloc;
+};