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Diffstat (limited to 'arch/arm/include/asm/arch-ls102xa/config.h')
-rw-r--r--arch/arm/include/asm/arch-ls102xa/config.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 033341dbfb6..62026bda9e2 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -55,22 +55,22 @@
#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000)
-#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
-#define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
-
-#define CONFIG_SYS_PCIE1_PHYS_BASE 0x4000000000ULL
-#define CONFIG_SYS_PCIE2_PHYS_BASE 0x4800000000ULL
-#define CONFIG_SYS_PCIE1_VIRT_ADDR 0x24000000UL
-#define CONFIG_SYS_PCIE2_VIRT_ADDR 0x34000000UL
-#define CONFIG_SYS_PCIE_MMAP_SIZE (192 * 1024 * 1024) /* 192M */
+#define CFG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000)
+#define CFG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000)
+
+#define CFG_SYS_PCIE1_PHYS_BASE 0x4000000000ULL
+#define CFG_SYS_PCIE2_PHYS_BASE 0x4800000000ULL
+#define CFG_SYS_PCIE1_VIRT_ADDR 0x24000000UL
+#define CFG_SYS_PCIE2_VIRT_ADDR 0x34000000UL
+#define CFG_SYS_PCIE_MMAP_SIZE (192 * 1024 * 1024) /* 192M */
/*
* TLB will map VIRT_ADDR to (PHYS_BASE + VIRT_ADDR)
* So 40bit PCIe PHY addr can directly be converted to a 32bit virtual addr.
*/
-#define CONFIG_SYS_PCIE1_PHYS_ADDR (CONFIG_SYS_PCIE1_PHYS_BASE + \
- CONFIG_SYS_PCIE1_VIRT_ADDR)
-#define CONFIG_SYS_PCIE2_PHYS_ADDR (CONFIG_SYS_PCIE2_PHYS_BASE + \
- CONFIG_SYS_PCIE2_VIRT_ADDR)
+#define CFG_SYS_PCIE1_PHYS_ADDR (CFG_SYS_PCIE1_PHYS_BASE + \
+ CFG_SYS_PCIE1_VIRT_ADDR)
+#define CFG_SYS_PCIE2_PHYS_ADDR (CFG_SYS_PCIE2_PHYS_BASE + \
+ CFG_SYS_PCIE2_VIRT_ADDR)
/* SATA */
#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000)