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-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi6
-rw-r--r--arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts5
-rw-r--r--arch/arm/dts/imx8mp-dhcom-som.dtsi8
4 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9968e819550..45af7662075 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1298,6 +1298,7 @@ targets += $(dtb-y)
# Add any required device tree compiler flags here
DTC_FLAGS += -a 0x8
+DTC_FLAGS_imx8mp-dhcom-som-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format
DTC_FLAGS_imx8mp-dhcom-pdk3-overlay-rev100 += -Wno-avoid_default_addr_size -Wno-reg_format
PHONY += dtbs
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
index ed183f83a77..380146596c0 100644
--- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -32,12 +32,6 @@
bootph-pre-ram;
};
-&eqos {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
&ethphy0 {
reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
reset-assert-us = <15000>;
diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
index 0e5d329b149..b2154d57e48 100644
--- a/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
+++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
@@ -35,6 +35,7 @@
&ethphy0f { /* SMSC LAN8740Ai */
pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
+ reg = <0>;
};
&ethphy0g { /* Micrel KSZ9131RNXI */
@@ -42,6 +43,10 @@
reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
};
+&ethphy1f { /* SMSC LAN8740Ai */
+ reg = <1>;
+};
+
&i2c3 {
adc@48 {
compatible = "ti,tla2024";
diff --git a/arch/arm/dts/imx8mp-dhcom-som.dtsi b/arch/arm/dts/imx8mp-dhcom-som.dtsi
index b504d36818b..f2d99d05854 100644
--- a/arch/arm/dts/imx8mp-dhcom-som.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-som.dtsi
@@ -100,14 +100,14 @@
#size-cells = <0>;
/* Up to one of these two PHYs may be populated. */
- ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */
+ ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */
compatible = "ethernet-phy-id0007.c110",
"ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio3>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy0>;
pinctrl-names = "default";
- reg = <0>;
+ reg = <1>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
@@ -146,14 +146,14 @@
#size-cells = <0>;
/* Up to one PHY may be populated. */
- ethphy1f: ethernet-phy@1 { /* SMSC LAN8740Ai */
+ ethphy1f: ethernet-phy@2 { /* SMSC LAN8740Ai */
compatible = "ethernet-phy-id0007.c110",
"ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio4>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy1>;
pinctrl-names = "default";
- reg = <1>;
+ reg = <2>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;