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-rw-r--r--arch/arm/Kconfig9
-rw-r--r--arch/arm/cpu/armv8/Makefile1
-rw-r--r--arch/arm/cpu/armv8/xen/Makefile6
-rw-r--r--arch/arm/cpu/armv8/xen/hypercall.S79
-rw-r--r--arch/arm/cpu/armv8/xen/lowlevel_init.S33
-rw-r--r--arch/arm/include/asm/arch-aspeed/platform.h20
-rw-r--r--arch/arm/include/asm/io.h4
-rw-r--r--arch/arm/include/asm/xen.h7
-rw-r--r--arch/arm/include/asm/xen/hypercall.h22
-rw-r--r--arch/arm/include/asm/xen/system.h88
-rw-r--r--arch/arm/mach-aspeed/Makefile2
-rw-r--r--arch/arm/mach-aspeed/ast2500/Makefile2
-rw-r--r--arch/arm/mach-aspeed/ast2500/board_common.c (renamed from arch/arm/mach-aspeed/ast2500-board.c)25
-rw-r--r--arch/arm/mach-aspeed/ast2500/lowlevel_init.S41
14 files changed, 313 insertions, 26 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b8a32c38d9..84018516668 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1749,6 +1749,14 @@ config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
+config TARGET_XENGUEST_ARM64
+ bool "Xen guest ARM64"
+ select ARM64
+ select XEN
+ select OF_CONTROL
+ select LINUX_KERNEL_IMAGE_HEADER
+ select XEN_SERIAL
+ select SSCANF
endchoice
config ARCH_SUPPORT_TFABOOT
@@ -1955,6 +1963,7 @@ source "board/xilinx/Kconfig"
source "board/xilinx/zynq/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
source "board/phytium/durian/Kconfig"
+source "board/xen/xenguest_arm64/Kconfig"
source "arch/arm/Kconfig.debug"
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index 7e33a183d54..93d26f98568 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -40,3 +40,4 @@ obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
obj-$(CONFIG_ARMV8_PSCI) += psci.o
obj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o
obj-$(CONFIG_TARGET_BCMNS3) += bcmns3/
+obj-$(CONFIG_XEN) += xen/
diff --git a/arch/arm/cpu/armv8/xen/Makefile b/arch/arm/cpu/armv8/xen/Makefile
new file mode 100644
index 00000000000..e3b4ae2bd40
--- /dev/null
+++ b/arch/arm/cpu/armv8/xen/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) 2018 NXP
+# (C) 2020 EPAM Systems Inc.
+
+obj-y += lowlevel_init.o hypercall.o
diff --git a/arch/arm/cpu/armv8/xen/hypercall.S b/arch/arm/cpu/armv8/xen/hypercall.S
new file mode 100644
index 00000000000..731256b34e2
--- /dev/null
+++ b/arch/arm/cpu/armv8/xen/hypercall.S
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * hypercall.S
+ *
+ * Xen hypercall wrappers
+ *
+ * Stefano Stabellini <stefano.stabellini@eu.citrix.com>, Citrix, 2012
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation; or, when distributed
+ * separately from the Linux kernel or incorporated into other
+ * software packages, subject to the following license:
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this source file (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy, modify,
+ * merge, publish, distribute, sublicense, and/or sell copies of the Software,
+ * and to permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/*
+ * The Xen hypercall calling convention is very similar to the procedure
+ * call standard for the ARM 64-bit architecture: the first parameter is
+ * passed in x0, the second in x1, the third in x2, the fourth in x3 and
+ * the fifth in x4.
+ *
+ * The hypercall number is passed in x16.
+ *
+ * The return value is in x0.
+ *
+ * The hvc ISS is required to be 0xEA1, that is the Xen specific ARM
+ * hypercall tag.
+ *
+ * Parameter structs passed to hypercalls are laid out according to
+ * the ARM 64-bit EABI standard.
+ */
+
+#include <xen/interface/xen.h>
+
+#define XEN_HYPERCALL_TAG 0xEA1
+
+#define HYPERCALL_SIMPLE(hypercall) \
+.globl HYPERVISOR_##hypercall; \
+.align 4,0x90; \
+HYPERVISOR_##hypercall: \
+ mov x16, #__HYPERVISOR_##hypercall; \
+ hvc XEN_HYPERCALL_TAG; \
+ ret; \
+
+#define HYPERCALL0 HYPERCALL_SIMPLE
+#define HYPERCALL1 HYPERCALL_SIMPLE
+#define HYPERCALL2 HYPERCALL_SIMPLE
+#define HYPERCALL3 HYPERCALL_SIMPLE
+#define HYPERCALL4 HYPERCALL_SIMPLE
+#define HYPERCALL5 HYPERCALL_SIMPLE
+
+ .text
+
+HYPERCALL2(xen_version);
+HYPERCALL3(console_io);
+HYPERCALL3(grant_table_op);
+HYPERCALL2(sched_op);
+HYPERCALL2(event_channel_op);
+HYPERCALL2(hvm_op);
+HYPERCALL2(memory_op);
+
diff --git a/arch/arm/cpu/armv8/xen/lowlevel_init.S b/arch/arm/cpu/armv8/xen/lowlevel_init.S
new file mode 100644
index 00000000000..760e32ed761
--- /dev/null
+++ b/arch/arm/cpu/armv8/xen/lowlevel_init.S
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * (C) 2017 NXP
+ * (C) 2020 EPAM Systems Inc.
+ */
+
+#include <config.h>
+
+.align 8
+.global rom_pointer
+rom_pointer:
+ .space 32
+
+/*
+ * Routine: save_boot_params (called after reset from start.S)
+ */
+
+.global save_boot_params
+save_boot_params:
+ /* The firmware provided ATAG/FDT address can be found in r2/x0 */
+ adr x1, rom_pointer
+ stp x0, x2, [x1], #16
+ stp x3, x4, [x1], #16
+
+ /* Returns */
+ b save_boot_params_ret
+
+.global restore_boot_params
+restore_boot_params:
+ adr x1, rom_pointer
+ ldp x0, x2, [x1], #16
+ ldp x3, x4, [x1], #16
+ ret
diff --git a/arch/arm/include/asm/arch-aspeed/platform.h b/arch/arm/include/asm/arch-aspeed/platform.h
new file mode 100644
index 00000000000..6cee036f54c
--- /dev/null
+++ b/arch/arm/include/asm/arch-aspeed/platform.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) ASPEED Technology Inc.
+ * Ryan Chen <ryan_chen@aspeedtech.com>
+ *
+ */
+
+#ifndef _ASM_ARCH_PLATFORM_H
+#define _ASM_ARCH_PLATFORM_H
+
+#if defined(CONFIG_ASPEED_AST2500)
+#define ASPEED_MAC_COUNT 2
+#define ASPEED_DRAM_BASE 0x80000000
+#define ASPEED_SRAM_BASE 0x1e720000
+#define ASPEED_SRAM_SIZE 0x9000
+#else
+#err "Unrecognized Aspeed platform."
+#endif
+
+#endif
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 8959749ad65..ade1401f3b4 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -110,9 +110,13 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
* have some advantages to use them instead of the simple one here.
*/
#define mb() dsb()
+#define rmb() dsb()
+#define wmb() dsb()
#define __iormb() dmb()
#define __iowmb() dmb()
+#define smp_processor_id() 0
+
#define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; })
#define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
diff --git a/arch/arm/include/asm/xen.h b/arch/arm/include/asm/xen.h
new file mode 100644
index 00000000000..8e2ee3d64ea
--- /dev/null
+++ b/arch/arm/include/asm/xen.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0+
+ *
+ * (C) 2020 EPAM Systems Inc.
+ */
+
+extern unsigned long rom_pointer[];
+
diff --git a/arch/arm/include/asm/xen/hypercall.h b/arch/arm/include/asm/xen/hypercall.h
new file mode 100644
index 00000000000..a4fd077079a
--- /dev/null
+++ b/arch/arm/include/asm/xen/hypercall.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * hypercall.h
+ *
+ * Linux-specific hypervisor handling.
+ *
+ * Stefano Stabellini <stefano.stabellini@eu.citrix.com>, Citrix, 2012
+ */
+
+#ifndef _ASM_ARM_XEN_HYPERCALL_H
+#define _ASM_ARM_XEN_HYPERCALL_H
+
+#include <xen/interface/xen.h>
+
+int HYPERVISOR_xen_version(int cmd, void *arg);
+int HYPERVISOR_console_io(int cmd, int count, char *str);
+int HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count);
+int HYPERVISOR_sched_op(int cmd, void *arg);
+int HYPERVISOR_event_channel_op(int cmd, void *arg);
+unsigned long HYPERVISOR_hvm_op(int op, void *arg);
+int HYPERVISOR_memory_op(unsigned int cmd, void *arg);
+#endif /* _ASM_ARM_XEN_HYPERCALL_H */
diff --git a/arch/arm/include/asm/xen/system.h b/arch/arm/include/asm/xen/system.h
new file mode 100644
index 00000000000..0fc8a7995ca
--- /dev/null
+++ b/arch/arm/include/asm/xen/system.h
@@ -0,0 +1,88 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * (C) 2014 Karim Allah Ahmed <karim.allah.ahmed@gmail.com>
+ * (C) 2020, EPAM Systems Inc.
+ */
+#ifndef _ASM_ARM_XEN_SYSTEM_H
+#define _ASM_ARM_XEN_SYSTEM_H
+
+#include <compiler.h>
+#include <asm/bitops.h>
+
+/* If *ptr == old, then store new there (and return new).
+ * Otherwise, return the old value.
+ * Atomic.
+ */
+#define synch_cmpxchg(ptr, old, new) \
+({ __typeof__(*ptr) stored = old; \
+ __atomic_compare_exchange_n(ptr, &stored, new, 0, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST) ? new : old; \
+})
+
+/* As test_and_clear_bit, but using __ATOMIC_SEQ_CST */
+static inline int synch_test_and_clear_bit(int nr, volatile void *addr)
+{
+ u8 *byte = ((u8 *)addr) + (nr >> 3);
+ u8 bit = 1 << (nr & 7);
+ u8 orig;
+
+ orig = __atomic_fetch_and(byte, ~bit, __ATOMIC_SEQ_CST);
+
+ return (orig & bit) != 0;
+}
+
+/* As test_and_set_bit, but using __ATOMIC_SEQ_CST */
+static inline int synch_test_and_set_bit(int nr, volatile void *base)
+{
+ u8 *byte = ((u8 *)base) + (nr >> 3);
+ u8 bit = 1 << (nr & 7);
+ u8 orig;
+
+ orig = __atomic_fetch_or(byte, bit, __ATOMIC_SEQ_CST);
+
+ return (orig & bit) != 0;
+}
+
+/* As set_bit, but using __ATOMIC_SEQ_CST */
+static inline void synch_set_bit(int nr, volatile void *addr)
+{
+ synch_test_and_set_bit(nr, addr);
+}
+
+/* As clear_bit, but using __ATOMIC_SEQ_CST */
+static inline void synch_clear_bit(int nr, volatile void *addr)
+{
+ synch_test_and_clear_bit(nr, addr);
+}
+
+/* As test_bit, but with a following memory barrier. */
+//static inline int synch_test_bit(int nr, volatile void *addr)
+static inline int synch_test_bit(int nr, const void *addr)
+{
+ int result;
+
+ result = test_bit(nr, addr);
+ barrier();
+ return result;
+}
+
+#define xchg(ptr, v) __atomic_exchange_n(ptr, v, __ATOMIC_SEQ_CST)
+#define xchg(ptr, v) __atomic_exchange_n(ptr, v, __ATOMIC_SEQ_CST)
+
+#define xen_mb() mb()
+#define xen_rmb() rmb()
+#define xen_wmb() wmb()
+
+#define to_phys(x) ((unsigned long)(x))
+#define to_virt(x) ((void *)(x))
+
+#define PFN_UP(x) (unsigned long)(((x) + PAGE_SIZE - 1) >> PAGE_SHIFT)
+#define PFN_DOWN(x) (unsigned long)((x) >> PAGE_SHIFT)
+#define PFN_PHYS(x) ((unsigned long)(x) << PAGE_SHIFT)
+#define PHYS_PFN(x) (unsigned long)((x) >> PAGE_SHIFT)
+
+#define virt_to_pfn(_virt) (PFN_DOWN(to_phys(_virt)))
+#define virt_to_mfn(_virt) (PFN_DOWN(to_phys(_virt)))
+#define mfn_to_virt(_mfn) (to_virt(PFN_PHYS(_mfn)))
+#define pfn_to_virt(_pfn) (to_virt(PFN_PHYS(_pfn)))
+
+#endif
diff --git a/arch/arm/mach-aspeed/Makefile b/arch/arm/mach-aspeed/Makefile
index 1557dcae66d..33f65b50b28 100644
--- a/arch/arm/mach-aspeed/Makefile
+++ b/arch/arm/mach-aspeed/Makefile
@@ -3,4 +3,4 @@
# Copyright (c) 2016 Google, Inc
obj-$(CONFIG_ARCH_ASPEED) += ast_wdt.o
-obj-$(CONFIG_ASPEED_AST2500) += ast2500/ ast2500-board.o
+obj-$(CONFIG_ASPEED_AST2500) += ast2500/
diff --git a/arch/arm/mach-aspeed/ast2500/Makefile b/arch/arm/mach-aspeed/ast2500/Makefile
index a35b239ef35..4c27c8fc465 100644
--- a/arch/arm/mach-aspeed/ast2500/Makefile
+++ b/arch/arm/mach-aspeed/ast2500/Makefile
@@ -1 +1,3 @@
+obj-y += lowlevel_init.o
+obj-y += board_common.o
obj-y += clk_ast2500.o sdram_ast2500.o
diff --git a/arch/arm/mach-aspeed/ast2500-board.c b/arch/arm/mach-aspeed/ast2500/board_common.c
index f74dcbbb624..3482ee91efd 100644
--- a/arch/arm/mach-aspeed/ast2500-board.c
+++ b/arch/arm/mach-aspeed/ast2500/board_common.c
@@ -28,31 +28,6 @@
DECLARE_GLOBAL_DATA_PTR;
-void lowlevel_init(void)
-{
- /*
- * These two watchdogs need to be stopped as soon as possible,
- * otherwise the board might hang. By default they are set to
- * a very short timeout and even simple debug write to serial
- * console early in the init process might cause them to fire.
- */
- struct ast_wdt *flash_addr_wdt =
- (struct ast_wdt *)(WDT_BASE +
- sizeof(struct ast_wdt) *
- AST_FLASH_ADDR_DETECT_WDT);
-
- clrbits_le32(&flash_addr_wdt->ctrl, WDT_CTRL_EN);
-
-#ifndef CONFIG_FIRMWARE_2ND_BOOT
- struct ast_wdt *sec_boot_wdt =
- (struct ast_wdt *)(WDT_BASE +
- sizeof(struct ast_wdt) *
- AST_2ND_BOOT_WDT);
-
- clrbits_le32(&sec_boot_wdt->ctrl, WDT_CTRL_EN);
-#endif
-}
-
int board_init(void)
{
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
diff --git a/arch/arm/mach-aspeed/ast2500/lowlevel_init.S b/arch/arm/mach-aspeed/ast2500/lowlevel_init.S
new file mode 100644
index 00000000000..9ec3dd46b70
--- /dev/null
+++ b/arch/arm/mach-aspeed/ast2500/lowlevel_init.S
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) ASPEED Technology Inc.
+ */
+#include <asm/arch/scu_ast2500.h>
+
+/* registers for low level init */
+#define SCU_PROT_KEY 0x1e6e2000
+#define SCU_VGA_HANDSHAKE 0x1e6e2040
+#define SCU_HW_STRAP 0x1e6e2070
+#define SCU_HW_STRAP_CLR 0x1e6e207c
+#define WDT3_CTRL 0x1e78504c
+
+.global lowlevel_init
+lowlevel_init:
+
+ /* unlock SCU */
+ ldr r0, =SCU_PROT_KEY
+ ldr r1, =SCU_UNLOCK_VALUE
+ str r1, [r0]
+
+ /* set BMC FW as DRAM initializer */
+ ldr r0, =SCU_VGA_HANDSHAKE
+ ldr r1, [r0]
+ orr r1, #0x80
+ str r1, [r0]
+
+ /* set PERST# as LPC reset source if eSPI mode is enabled*/
+ ldr r0, =SCU_HW_STRAP
+ ldr r1, [r0]
+ tst r1, #(0x1 << 25)
+ ldrne r0, =SCU_HW_STRAP_CLR
+ movne r1, #(0x1 << 14)
+ strne r1, [r0]
+
+ /* disable WDT3 for SPI 3/4 bytes auto-detection */
+ ldr r0, =WDT3_CTRL
+ mov r1, #0x0
+ str r1, [r0]
+
+ mov pc, lr
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-21 10:57:12 +0000