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-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig34
-rw-r--r--arch/powerpc/include/asm/config_mpc85xx.h8
2 files changed, 34 insertions, 8 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 5510bc72878..2cc0185c377 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -187,6 +187,7 @@ config ARCH_B4420
select E500MC
select E6500
select FSL_LAW
+ select HETROGENOUS_CLUSTERS
select SYS_FSL_DDR_VER_47
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A005871
@@ -214,6 +215,7 @@ config ARCH_B4860
select E500MC
select E6500
select FSL_LAW
+ select HETROGENOUS_CLUSTERS
select SYS_FSL_DDR_VER_47
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A005871
@@ -822,6 +824,9 @@ config FSL_LAW
help
Use Freescale common code for Local Access Window
+config HETROGENOUS_CLUSTERS
+ bool
+
config NXP_ESBC
bool "NXP_ESBC"
help
@@ -1121,6 +1126,35 @@ config SYS_NUM_TLBCAMS
Number of TLB CAM entries for Book-E chips. 64 for E500MC,
16 for other E500 SoCs.
+if HETROGENOUS_CLUSTERS
+
+config SYS_MAPLE
+ def_bool y
+
+config SYS_CPRI
+ def_bool y
+
+config PPC_CLUSTER_START
+ int
+ default 0
+
+config DSP_CLUSTER_START
+ int
+ default 1
+
+config SYS_CPRI_CLK
+ int
+ default 3
+
+config SYS_ULB_CLK
+ int
+ default 4
+
+config SYS_ETVPE_CLK
+ int
+ default 1
+endif
+
config BACKSIDE_L2_CACHE
bool
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 06f66d02de2..225befb3a5e 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -206,19 +206,11 @@
#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
-#define CONFIG_HETROGENOUS_CLUSTERS /* DSP/SC3900 core clusters */
-#define CONFIG_PPC_CLUSTER_START 0 /*Start index of ppc clusters*/
-#define CONFIG_DSP_CLUSTER_START 1 /*Start index of dsp clusters*/
#define CONFIG_SYS_FSL_SRDS_1
#define CONFIG_SYS_FSL_SRDS_2
-#define CONFIG_SYS_MAPLE
-#define CONFIG_SYS_CPRI
#define CONFIG_SYS_FSL_NUM_CC_PLLS 5
#define CONFIG_SYS_NUM_FMAN 1
#define CONFIG_SYS_FM1_CLK 0
-#define CONFIG_SYS_CPRI_CLK 3
-#define CONFIG_SYS_ULB_CLK 4
-#define CONFIG_SYS_ETVPE_CLK 1
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
#define CONFIG_SYS_FMAN_V3
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000