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-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig35
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 24d3f1f20c2..f2361560e9a 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -252,6 +252,8 @@ config TARGET_KMCENT2
bool "Support kmcent2"
select VENDOR_KM
select FSL_CORENET
+ select SYS_DPAA_FMAN
+ select SYS_DPAA_PME
select SYS_L3_SIZE_256KB
endchoice
@@ -618,6 +620,9 @@ config ARCH_P2041
select E500MC
select FSL_LAW
select SYS_CACHE_SHIFT_6
+ select SYS_DPAA_FMAN
+ select SYS_DPAA_PME
+ select SYS_DPAA_RMAN
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
select SYS_FSL_ERRATUM_A005275
@@ -762,6 +767,7 @@ config ARCH_T1024
select FSL_CORENET
select FSL_LAW
select SYS_CACHE_SHIFT_6
+ select SYS_DPAA_FMAN
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008378
select SYS_FSL_ERRATUM_A008109
@@ -792,6 +798,8 @@ config ARCH_T1040
select FSL_CORENET
select FSL_LAW
select SYS_CACHE_SHIFT_6
+ select SYS_DPAA_FMAN
+ select SYS_DPAA_PME
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
@@ -822,6 +830,8 @@ config ARCH_T1042
select FSL_CORENET
select FSL_LAW
select SYS_CACHE_SHIFT_6
+ select SYS_DPAA_FMAN
+ select SYS_DPAA_PME
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
@@ -851,6 +861,10 @@ config ARCH_T2080
select FSL_CORENET
select FSL_LAW
select SYS_CACHE_SHIFT_6
+ select SYS_DPAA_DCE if !NOBQFMAN
+ select SYS_DPAA_FMAN if !NOBQFMAN
+ select SYS_DPAA_PME if !NOBQFMAN
+ select SYS_DPAA_RMAN if !NOBQFMAN
select SYS_FSL_DDR_VER_47
select SYS_FSL_ERRATUM_A006379
select SYS_FSL_ERRATUM_A006593
@@ -871,6 +885,7 @@ config ARCH_T2080
select SYS_FSL_SRIO_LIODN
select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN
select SYS_FSL_USB_DUAL_PHY_ENABLE
+ select SYS_PMAN if !NOBQFMAN
select SYS_PPC64
select FSL_IFC
imply CMD_SATA
@@ -886,6 +901,10 @@ config ARCH_T4240
select FSL_CORENET
select FSL_LAW
select SYS_CACHE_SHIFT_6
+ select SYS_DPAA_DCE if !NOBQFMAN
+ select SYS_DPAA_FMAN if !NOBQFMAN
+ select SYS_DPAA_PME if !NOBQFMAN
+ select SYS_DPAA_RMAN if !NOBQFMAN
select SYS_FSL_DDR_VER_47
select SYS_FSL_ERRATUM_A004468
select SYS_FSL_ERRATUM_A005871
@@ -907,6 +926,7 @@ config ARCH_T4240
select SYS_FSL_SRIO_LIODN
select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN
select SYS_FSL_USB_DUAL_PHY_ENABLE
+ select SYS_PMAN if !NOBQFMAN
select SYS_PPC64
select FSL_IFC
imply CMD_SATA
@@ -947,6 +967,9 @@ config E6500
help
Enable PowerPC E6500 core
+config NOBQFMAN
+ bool
+
config FSL_LAW
bool
help
@@ -1019,6 +1042,15 @@ config SYS_CCSRBAR_DEFAULT
if changed by pre-boot regime. The value here must match
the current value in SoC. If not sure, do not change.
+config SYS_DPAA_PME
+ bool
+
+config SYS_DPAA_DCE
+ bool
+
+config SYS_DPAA_RMAN
+ bool
+
config A003399_NOR_WORKAROUND
bool
help
@@ -1195,6 +1227,9 @@ config FSL_PCIE_DISABLE_ASPM
config FSL_PCIE_RESET
bool
+config SYS_PMAN
+ bool
+
config SYS_FSL_RAID_ENGINE
bool